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WO/2024/097853A1 |
This disclosure pertains to semiconductor processing chambers with segregated gas delivery using a showerhead and a circumferential shroud that encircles the wafer processing area.
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WO/2024/095769A1 |
Provided is a method for manufacturing a member having a concave structure, the method comprising: (1) a step for installing a catalyst material on a portion of a first surface of an object to be treated, wherein the first surface is com...
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WO/2024/095840A1 |
This substrate processing apparatus comprises a processing container, a stage, an edge ring, a lifter, and a control unit. The stage has a first mounting surface and a second mounting surface. The edge ring is mounted on the second mount...
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WO/2024/095714A1 |
The present invention improves the adhesion between a bonding section of a metal wiring plate and a sealing resin in a semiconductor module. This semiconductor module (1) has: a layered substrate (2) in which a plurality of circuit plate...
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WO/2024/095690A1 |
The present invention provides: a film forming apparatus which is capable of having a substrate sucked onto a suction member in a stable state; a method for driving a film forming apparatus; and a film forming method. A film forming ap...
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WO/2024/095108A1 |
Provided is a semiconductor device that can be miniaturized or highly integrated. The semiconductor device comprises: a first insulator on a substrate; a second insulator on the first insulator; a third insulator on the second insulator;...
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WO/2024/092338A1 |
Various systems and methods for imprinting a unique identifier on a semiconductor die are disclosed herein. Example embodiments involve receiving a substrate at a photolithography station, the substrate including a photosensitive layer a...
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WO/2024/092560A1 |
A multi-coordinate-system calibration and device alignment method, comprising: determining a first mapping relationship between a first image pixel coordinate system of an intermediate load substrate carrier platform and a world coordina...
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WO/2024/095887A1 |
[Problem] To prevent a deterioration in resistance of a metal layer or a reduction in processability caused by the etching of the metal layer. [Solution] Provided is a method for manufacturing a semiconductor device including an insulati...
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WO/2024/096243A1 |
A display device of the present invention comprises: a first pixel including a first light-emitting area; a second pixel including a second light-emitting area spaced apart from the first light-emitting area in a second direction; and a ...
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WO/2024/097547A1 |
The disclosed and claimed subject matter relates to high purity alkynyl amines substantially free of residual halides and/or water and their use (e.g., in formulations) for enhanced passivation of metallic substrates.
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WO/2024/097039A1 |
A method for forming a metal liner layer for an interconnect uses a multi-metal deposition process to produce a reduced thickness liner. The back-end-of-the-line packaging process may include forming a metal liner layer by depositing a r...
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WO/2024/093025A1 |
Provided in the embodiments of the present disclosure is a semiconductor interconnection structure, comprising: a substrate, provided with a first surface and a second surface which are oppositely arranged; a plurality of conductive pill...
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WO/2024/095805A1 |
Provided is a solid-state imaging device having a laminated structure in which a first substrate and a second substrate that is smaller in area than the first substrate are layered. The first substrate has: an electronic circuit that inc...
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WO/2024/095458A1 |
A first selective growth mask (103) formed on a first semiconductor layer (102) has a frame shape provided with a rectangular first opening (103a) in a planar view. A region of the first opening (103a) is a region in which an element is ...
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WO/2024/095768A1 |
This substrate processing method for processing a substrate includes forming a reformed layer and a crack by irradiating a substrate with a laser beam, and involves: acquiring data relating to a cumulative number of substrates processed,...
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WO/2024/092483A1 |
Provided are a light-emitting substrate, a light-emitting device and a lighting device. The light-emitting substrate comprises: a base substrate, comprising a plurality of light-emitting regions and a plurality of non-light emitting regi...
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WO/2024/097569A1 |
Methods and systems for evaluating individual semiconductor metrology tool productivity based on both individual tool productivity metrics and fleet productivity metrics are described herein. Productivity metrics associated with each ind...
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WO/2024/096767A1 |
Methods and apparatuses for estimating a property of a semiconductor device using a quantum computing device are provided. A method comprises initializing a first system of equations based on one or more parameters relating to a spatiall...
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WO/2024/097005A1 |
In certain embodiments, a method includes forming, on a substrate by spin-on deposition, a layer stack of alternating layers of first and second carbon-containing materials. The layers of the first carbon-containing material include an a...
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WO/2024/093190A1 |
Embodiments of the present disclosure provide a semiconductor structure manufacturing method, and a semiconductor structure. The manufacturing method comprises: a substrate at least comprising mark regions and a blank region located betw...
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WO/2024/096277A1 |
The present invention relates to a polishing slurry composition. An embodiment pertains to a polishing slurry composition for organic membrane polishing, the composition including: polishing particles containing metal-coated metal oxide;...
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WO/2024/097585A1 |
A method of doping a substrate may include exposing a substrate surface of the semiconductor substrate to a plasma clean, performing a deposition of a dopant layer on the substrate surface using a plasma source, after the plasma clean, t...
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WO/2024/094304A1 |
The present invention relates to a method for heating of a substrate (20), in particular a substrate (20) of a thermal laser evaporation (TLE) system (10). Further, the present invention relates to a substrate heater (30) for heating a s...
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WO/2024/097891A2 |
Methods for maintaining stable resistivity of a high resistivity silicon-on-insulator (HR-SOI) wafer are presented. The HR-SOI wafer includes a HR-Si substrate having a resistivity that is higher than about 1000 ohm.cm and a dopant conce...
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WO/2024/097679A1 |
Systems and methods for increasing a heat transfer contact area associated with an edge ring are described. The edge ring includes a horizontal section having an inner diameter and an outer diameter. The inner diameter surrounds a substr...
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WO/2024/092903A1 |
The disclosure relates to a semiconductor structure and a preparation method therefor. The preparation method comprises: providing a substrate, wherein the substrate is provided with a first region and a second region; forming gate struc...
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WO/2024/095751A1 |
Provided is a light-detecting device which comprises a through conductor and in which degradation of electrical characteristics is suppressed even at an aspect ratio tailored for miniaturization or the like. The light-detecting device in...
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WO/2024/045864A9 |
Provided in the present application are a semiconductor device, a preparation method and an electronic device. The method comprises: forming, on a substrate, a plurality of stacked structures, which are arranged spaced apart from each ot...
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WO/2024/095109A1 |
Provided is a semiconductor device having reduced power consumption. Or, provided is a semiconductor device having high reliability. Or, provided is a semiconductor device in which increases in circuit layout area are suppressed. Or, pro...
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WO/2024/097903A1 |
Semiconductor fabrication component preparation methods are described. In embodiments, the methods include forming a first layer on a surface of the semiconductor fabrication component. The first layer is characterized by a porosity of g...
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WO/2024/093124A1 |
A switch standard unit, a switch, and a layout design method. The switch standard unit comprises a switch input part, a switch output part and a connecting part, all of which are arranged in a framework area, wherein the switch input par...
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WO/2024/095760A1 |
Provided is a substrate processing apparatus capable of preventing adverse effects on a substrate due to a water repellant. A substrate processing apparatus 1 according to the present invention is configured such that, when a substrate W...
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WO/2024/095537A1 |
The present invention realizes a capacitor that comprises composite bulk members with outstanding mechanical strength. The present invention is a capacitor that comprises: a conductive substrate; a plurality of fiber-like conductive memb...
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WO/2024/092550A1 |
The present invention relates to a quality improvement method and apparatus for a semiconductor device, and a high-energy particle beam photolithography device. The method comprises: acquiring connected regions consisting of target pixel...
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WO/2024/092947A1 |
Embodiments of the present disclosure provide a semiconductor structure and a method for forming same. The semiconductor structure comprises a substrate, the substrate comprising a plurality of active regions arranged at intervals in a f...
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WO/2024/096006A1 |
According to the present invention, it is possible to provide an aqueous composition for etching, the aqueous composition comprising an oxidizing agent, an acid, and a corrosion inhibitor, and having a pH of 0 to 3. The aqueous compositi...
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WO/2024/095639A1 |
[Problem] To provide a light receiving element in which random noise is reduced. [Solution] A light receiving element according to an aspect of the present disclosure comprises a photoelectric conversion circuit that outputs a pixel sign...
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WO/2024/049506A3 |
An ink may be provided that includes a two-dimensional WS2 nanosheet and an organic solvent, such as water, and may be free of protective molecules and surfactants. Circuits may be provided that include this ink disposed onto a surface o...
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WO/2024/095856A1 |
This substrate processing system comprises: a processing module including a processing chamber, a substrate support unit, and a lifter; a vacuum transfer module that is connected to the processing module and includes a transport robot fo...
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WO/2024/095536A1 |
Provided is a capacitor that uses a plurality of fibrous conductive members and has high bonding strength between a substrate and a composite bulk member. The capacitor comprises: a conductive substrate; a plurality of fibrous conductive...
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WO/2024/093138A1 |
Disclosed are a semiconductor structure and a manufacturing method therefor. The semiconductor structure comprises: a semiconductor channel, which extends in a first direction and is a component of a transistor, wherein in the first dire...
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WO/2024/095441A1 |
A semiconductor wafer transport container according to one embodiment comprises a plastic container for accommodating a semiconductor wafer. The vicinity of the surface of the plastic at least at an inner surface of the plastic container...
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WO/2024/095610A1 |
The present invention improves the noise resistance of a capacitor element that is formed within a through hole. This electronic device is provided with: a substrate; a through hole which penetrates through the substrate; a capacitor e...
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WO/2024/010848A3 |
A device includes a substrate and a ferroelectric layer supported by the substrate. The ferroelectric layer includes an alloy of a III-nitride material. The alloy includes a Group IIIB element. The substrate includes silicon.
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WO/2024/095780A1 |
A substrate processing system (S) according to one aspect of the present disclosure comprises a processing fluid supply device (70), a substrate processing device (1), a supply line, and a temperature measurement unit. The processing flu...
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WO/2024/092459A1 |
The present disclosure relates to a process restriction strategy determination method and apparatus, and a server. The method comprises: in response to an operation of binding process restriction strategies to a target device, displaying...
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WO/2024/097593A1 |
A method of method of treating a semiconductor substrate. The method may include, in a beamline ion implanter, exposing a substrate surface of the semiconductor substrate to a plasma clean and exposing the substrate surface to a hydrogen...
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WO/2024/095259A1 |
A method for defect mitigation is disclosed. The method may include receiving defect data for one or more defects of one or more samples. The defect data may include a defect location, a defect size, a defect shape, or a relationship bet...
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WO/2024/096663A1 |
The present invention provides a high-pressure substrate processing apparatus comprising: an inner chamber accommodating a substrate to be processed; an outer chamber provided with an outer housing accommodating the inner chamber and an ...
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