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Patent Searching and Data


Matches 251 - 300 out of 818,963

Document Document Title
WO/2024/106572A1
This transfer substrate comprises a first layer and a second layer on the first layer. The content of a curing agent in the second layer may be less than that in the first layer. The adhesion strength of the second layer may be greater t...  
WO/2024/105945A1
A method for cleaning a silicon wafer according to the present invention includes supplying an oxidizing agent from a position offset from the center of a silicon wafer in the radial direction in a surface layer modification step. A meth...  
WO/2024/103651A1
The present invention relates to a gas mixing device and method and a semiconductor process system. The gas mixing device comprises a first gas delivery unit, a second gas delivery unit, a concentration monitoring unit, a mixing and buff...  
WO/2024/104256A1
The present utility model provides an electroplating device for a solar cell, and an electroplating apparatus. The electroplating device comprises: a base body, provided with an electroplating space; a cathode plate, located in the elect...  
WO/2024/103895A1
An endpoint detection apparatus and an ion beam etching system. The endpoint detection apparatus comprises a mounting bottom plate, an anti-deposition member, a light-transmitting piece, and a detection element. The light-transmitting pi...  
WO/2024/107316A1
The invention provides a chemical-mechanical polishing composition comprising: (a) a rutile titanium dioxide abrasive; (b) an organic polishing promoter comprising a carboxylic acid, a urea, an amine, a thiol, a hydroxyl, an amide, a sul...  
WO/2024/104263A1
An air inlet nozzle device and a plasma etching machine. The air inlet nozzle device is used for providing a process gas for a reaction chamber of the plasma etching machine; the air inlet nozzle device comprises a first spraying hole pa...  
WO/2024/105811A1
This error factor analysis device estimates a sub-process that is an error cause from a plurality of sub-processes constituting an inspection process on the basis of a data set measured by an inspection device, and comprises: an error la...  
WO/2024/103512A1
The present disclosure relates to a semiconductor structure and a method for forming same. The method for forming the semiconductor structure comprises the following steps: providing a substrate, wherein the substrate comprises a storage...  
WO/2024/107706A1
In some embodiments, a packaged device can include an electrical device having first and second electrodes implemented on opposite sides of a body. The electrical device can be sandwiched between first and second terminal assemblies, wit...  
WO/2024/107757A1
This disclosure relates to systems and methods for reinforced semiconductor structures. In some embodiments, an assembly can include a substrate having a top surface and a bottom surface and one or more layers formed on the top surface o...  
WO/2024/105968A1
This thin-film transistor array comprises: a flexible substrate having a surface with insulating properties; and a plurality of thin-film transistors disposed on the flexible substrate. A thin-film transistor comprises: a semiconductor l...  
WO/2024/107384A1
Embodiments of the disclosure are directed to methods of removing metal oxide from a substrate surface by exposing the substrate surface to an un-biased cleaning plasma comprising a mixture of hydrogen (H2) and oxygen (O2). In some embod...  
WO/2024/105516A1
Provided is a semiconductor device with which refinement is simple. Provided is a semiconductor device with which parasitic capacitance is reduced. This semiconductor device is provided with: an insulating layer that functions as a first...  
WO/2024/107333A1
According to an embodiment, an apparatus for a hot plate apparatus is disclosed. The hot plate apparatus includes a housing structure, an alloy, and a heating element. The housing structure includes an outer shell surrounding a cavity. T...  
WO/2024/106268A1
This curable composition comprises a polymerizable compound (a), a photopolymerization initiator (b) and a solvent (d) and has a viscosity of 2 mPa·s to 60 mPa·s inclusive at 23°C, in which the curable composition from which the solve...  
WO/2024/106620A1
The present invention relates to an oxide thin film transistor with improved performance and a method for manufacturing same. More specifically, the present invention relates to: a manufacturing method in which a gate insulating film is ...  
WO/2024/105949A1
Provided is a mounting device equipped with a detection unit which displaces a head part that supports a first imaging unit and a second imaging unit, in each of which an optical system and an imaging element are disposed so as to satisf...  
WO/2024/107250A1
A method for processing a substrate that includes: performing a cyclic process including a plurality of cycles, where the cyclic process includes, forming a carbon-containing layer over sidewalls of a recess in a Si-containing dielectric...  
WO/2024/107824A1
Methods for preparing a donor silicon wafer by applying a SiGe layer on a silicon substrate wafer, depositing a silicon layer on the SiGe layer, etching the silicon layer to form an opening in the silicon layer, wet etching the SiGe laye...  
WO/2024/105732A1
This wafer conveyance robot which vacuum-suctions a wafer and conveys the same comprises a hand supporting the wafer. The hand has: a first finger and a second finger; a first suction part provided to the first finger; a second suction p...  
WO/2024/100979A1
The present invention is a method for evaluating a defect position in the depth direction of a wafer using X-ray topography (XRT), the wafer having a front surface and a back surface, the method characterized by comprising: a step for ca...  
WO/2024/099309A1
Provided are an array substrate and a display apparatus. The array substrate comprises: a base substrate, which comprises a main surface; a transistor, which is located on the main surface of the base substrate, and comprises an active l...  
WO/2024/101129A1
This semiconductor device includes: a chip that has a main surface; a trench electrode-type resistive structure that is formed on the main surface; and a resistive film that covers the resistive structure as a single coating target and i...  
WO/2024/098391A1
A 3D PCM architecture having a 3D PCM array with word lines and bit lines on a first die, a word line decoder on a second die, and the first die and the second die hybrid-bonded to each other in a face-to-face arrangement is disclosed he...  
WO/2024/101342A1
The present invention provides a heating device in which a temperature sensor can be disposed near a light-emitting semiconductor chip that is a heating source. The heating device 10 is constituted of a heating semiconductor chip 14 th...  
WO/2024/102274A1
Embodiments of methods are provided for thermal dry etching of a ruthenium (Ru) metal layer. In the disclosed embodiments, a substrate containing a Ru metal layer formed thereon is exposed to a gas pulse sequence, while the substrate is ...  
WO/2024/101774A1
The present invention relates to a method for manufacturing a group 3 nitride semiconductor template, the method comprising: a growing step of growing a seed layer with a nitrogen polar surface as an upper surface on a growth substrate; ...  
WO/2024/101089A1
This semiconductor device comprises: a substrate; a device region provided to the substrate; a terminal covering the device region in a planar view; and at least three pseudo bumps disposed densely in a layout so as to be positioned at v...  
WO/2024/102501A1
The present disclosure relates to semiconductor structures, methods for making the same, and methods using the same. The semiconductor structure comprises a first substrate, a second substrate on the first substrate, a first bonding laye...  
WO/2024/102155A1
A gas curtain device for a front opening unified pod has a casing. At least one first gas guide plate is disposed in the casing. The first gas guide plate has a first gas guide region. The first gas guide region has a plurality of first ...  
WO/2024/098567A1
The embodiments of the present disclosure relate to a memory, a semiconductor structure and a manufacturing method for the semiconductor structure. The manufacturing method for the semiconductor structure comprises: providing a substrate...  
WO/2024/102506A2
Described herein is a method for depositing a two-dimensional material film on a substrate. In some embodiments, the method comprises using a reactor with two regions to decompose the first precursor. In some embodiments, the method comp...  
WO/2024/101229A1
Disclosed is a plasma processing apparatus for removing a film, which is formed on the peripheral edge of a substrate, by means of a plasma, the plasma processing apparatus being provided with: a processing chamber which houses a substra...  
WO/2024/102293A1
The invention provides a chemical-mechanical polishing composition comprising: (a) silica abrasive; (b) an amine-based compound, wherein the amine-based compound comprises a carbon to nitrogen ratio of about 1:1 to about 3:1; (c) optiona...  
WO/2024/101232A1
The present disclosure provides a film which comprises a base material and an antistatic layer, wherein the antistatic layer is formed of a cured product of a composition that contains an antistatic agent, a polymerization initiator and ...  
WO/2024/101077A1
This shaping device (101) comprises: a base part (12) that can support a plate-shaped object; a plurality of support pins (4) as a support member that can take a first state protruding upward from the base part (12) in order to support t...  
WO/2024/100499A1
Provided is a semiconductor device having a small footprint. This semiconductor device has a transistor and a first insulating layer. The transistor has: a first conductive layer; a second conductive layer having a region that overlaps t...  
WO/2024/102313A1
A reticle container includes an outer pod and an inner pod, the inner pod configured to contain a reticle. The outer pod includes a pod door including a purge port, and a pod dome including one or more channels configured to receive a pu...  
WO/2024/101354A1
[Problem] To improve throughput when transporting at least two substrates. [Solution] Provided is a substrate transport system comprising: a transport means having a holding member that holds at least two substrates as a set parallel to ...  
WO/2024/101144A1
The present disclosure describes a substrate processing device that can etch a relatively hard film provided on the peripheral edge of a substrate at a relatively high etching rate without the use of plasma. The substrate processing de...  
WO/2024/098851A1
The present disclosure relates to a semiconductor structure and a forming method therefor. The forming method for a semiconductor structure comprises the following steps: providing a substrate; forming a first conductive layer on the sub...  
WO/2024/101030A1
This method for producing a multilayer device executes a first formation step, a second formation step and a bonding step. In the first formation step, a cutting part for individualizing a plurality of chip regions is formed in a first b...  
WO/2024/099378A1
Disclosed in the present invention are a conformal-shielding packaging method and structure for a substrate. The packaging method comprises the following steps: mounting a plurality of electronic elements on a substrate to form a plurali...  
WO/2024/100958A1
The present invention is a semiconductor epitaxial substrate manufacturing method characterized by comprising: an ion implantation step for implanting H+ into the surface of a 4H-SiC substrate; and an epitaxial growth step for epitaxiall...  
WO/2024/098637A1
The present invention provides a silicon carbide planar MOSFET device and a manufacturing method therefor. The method comprises: arranging shallow channels on the basis of a (0001) crystal surface where the channel current is still paral...  
WO/2024/101896A1
The present disclosure relates to a high-temperature electrostatic chuck, and the objective thereof is to provide a high-temperature electrostatic chuck on a surface for chucking a wafer or glass. To this end, provided is a high-temperat...  
WO/2024/101204A1
Provided are a light detection device and a multilayer substrate which can suppress a reduction in properties. The light detection device comprises: a multilayer part having a first substrate part, a second substrate part, and a third su...  
WO/2024/101006A1
In the present invention, a semiconductor device includes: a first-electroconductivity-type second medium-concentration region 121 that is selectively formed on the surface layer part of an outer periphery region 9 on the first-main-surf...  
WO/2024/102247A1
A substrate process station includes a housing including a transport region and process region. The process station further includes a magnetic levitation assembly disposed in the transport region configured to levitate and propel a subs...  

Matches 251 - 300 out of 818,963