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Matches 601 - 650 out of 818,524

Document Document Title
WO/2024/075808A1
A substrate treatment device (100) includes a nozzle (2), a first liquid receiver (41), a second liquid receiver (42), a drainage line (L2), a collection line (L3), a first reservoir (111), and a second reservoir (151). The nozzle (2) ex...  
WO/2024/076467A1
A method for developing a passivation film on a substrate with less than 10 atomic% of hydrogen includes providing the substrate within a processing station of a substrate processing system. A resultant passivation film is formed with le...  
WO/2024/075785A1
This substrate processing device comprises a chamber, an electrostatic chuck, a power source, and a control unit. The electrostatic chuck is provided inside a chamber and a substrate is placed thereon. Furthermore, the electrostatic chuc...  
WO/2023/245604A9
The present disclosure belongs to the technical field of display, and provides a thin-film transistor and a preparation method therefor, and a display device. The thin-film transistor comprises a gate electrode and a first active layer w...  
WO/2024/074968A1
Provided is a novel semiconductor device. The present invention comprises a flip-flop circuit and a memory circuit. The memory circuit comprises a first transistor, a second transistor, a first capacitance element, and a second capacitan...  
WO/2024/075381A1
Provided is a testing apparatus that comprises: an image data acquisition unit that acquires items of image data outputted by an image sensor as a device to be tested, in accordance with light having one or a plurality of emission patter...  
WO/2024/074967A1
Provided is a semiconductor device having a high storage density. This semiconductor device has a first layer and a second layer above the first layer. The first layer has first to fourth conductors, first to fifth insulators, and a firs...  
WO/2024/075514A1
This joining structure comprises a first joining target that has a first joining layer, a second joining target that has a second joining layer, and an intermediate joining material that is between the first joining target and the second...  
WO/2024/075391A1
This nitride semiconductor device (10) comprises: a hexagonal SiC substrate (22) having a main surface (22A) inclined at an off angle of 2-6° in a specific crystal direction with respect to the c-plane; a nitride semiconductor layer (24...  
WO/2024/075839A1
In this substrate-conveying robot system (100), a control unit (13) acquires a center position (20a) of a target member (20) in a horizontal plane on the basis of: a first tangent (TL1) corresponding to an outer circumferential edge sect...  
WO/2024/075679A1
A sensing terminal (500) comprises a detection sensor (511), a control unit (520), a battery (550), and an acceleration sensor (512). The detection sensor (511) detects the environment inside a substrate processing device (100). The cont...  
WO/2024/076916A1
ABSTRACT A disclosed example brush for dispensing multiple fluids during cleaning of a surface includes: an annular porous polymeric brush body configured to dispense a first fluid through the brush; and a first annular plate mechanicall...  
WO/2024/075818A1
In a robot system (100), a control unit (23) performs position identification control without stopping the rotation of a placement part (21) for detecting a marker (112), and, after a position (P2) of the marker (112) has been identified...  
WO/2024/076389A1
The present disclosure relates to cassette structures and related methods for batch processing in epitaxial deposition operations, In one implementation, a cassette configured for disposition in a substrate processing chamber includes a ...  
WO/2024/076860A1
Exemplary methods of semiconductor processing may include etching a portion of a silicon-containing material from a substrate disposed within a processing region of a semiconductor processing chamber. The silicon-containing material may ...  
WO/2024/076481A1
Cyclic azastannanes and cyclic oxostannanes having formulas (I) and (II) where X is an alkoxy or dialkylamino group are a new class of cyclic compounds. These compounds have desirably high vapor pressure and high purity (containing low l...  
WO/2024/074202A1
A mask (100) for masking a rear of an edge of a substrate (10) is described. The mask comprises a frame (110) having an opening (111) for receiving the substrate, wherein the frame has a protrusion (112) provided at an inner side (110A) ...  
WO/2024/075430A1
Provided is a method for producing an epitaxial wafer, the method comprising: a step for exposing a substrate 10 comprising a β-Ga2O3-based single crystal and containing a donor impurity to a GaCl gas and an O2 gas to allow an epitaxial...  
WO/2024/075671A1
In the present invention, a joining device (1) comprises: a stage (401); a head (402); support members (4039) that support the stage (401) so as to enable the stage (401) to move in the horizontal direction with respect to the head (402)...  
WO/2024/075377A1
According to the present invention, a film forming device for performing film formation on a substrate is used, the device comprising: an electrostatic chuck having a suction surface for suctioning a substrate; and a detection means for ...  
WO/2024/076386A1
A coating on a processing chamber component includes a metallic bond layer deposited on a surface of the component. A thermal barrier layer is deposited on the bond layer. A substantially non-porous ceramic sealing layer is deposited on ...  
WO/2024/075579A1
This substrate processing system comprises a load port, a processing chamber, a measurement unit, and a control unit. The load port is configured such that a storage container containing a substrate can be connected thereto. The processi...  
WO/2024/074929A1
The techniques described herein relate to a method for etching an ashable hard mask (AHM) on a substrate. The method includes forming a plasma from a gas mixture, wherein the gas mixture includes hydrogen peroxide vapor with a concentrat...  
WO/2024/075546A1
Provided is a polishing agent, a polishing method, and a method for manufacturing a semiconductor component that exhibit a good polishing speed in CMP of a surface to be polished, said surface including boron-doped silicon. The polishi...  
WO/2024/074011A1
Disclosed are a manufacturing method for a semiconductor structure and a semiconductor structure. The manufacturing method for the semiconductor structure comprises: providing a first chip, a second chip and a third chip; respectively bo...  
WO/2024/076332A1
The present invention relates to a method (100) for obtaining different self-assemblies of nanoparticles by using two solutions, each comprising at least one different nanoparticle.  
WO/2024/076216A1
The present invention relates to an activator, a semiconductor substrate manufactured using same, and a semiconductor device, and a method for manufacturing a titanium-containing deposition film according to the present invention has the...  
WO/2024/075704A1
Provided is a semiconductor processing solution that is used in the removal of a transition-metal-including substance on a substrate, the semiconductor processing solution including: at least one type of ion that is selected from the gro...  
WO/2024/070457A1
This cooling device cools a to-be-cooled item using a gas, and comprises: a case that accommodates the to-be-cooled item and includes side walls that surround the periphery of the to-be-cooled item; a plurality of supply holes that are d...  
WO/2024/070630A1
[Problem] To reduce the thickness of a transfer mechanism in the vertical direction. [Solution] A conveyance device 1 includes: a travel cart 5; a mast 6 erected on the travel cart 5; and a transfer mechanism 4 that is disposed on the ma...  
WO/2024/072806A1
A fabrication method of a semiconductor device is described. Generally, the method includes forming a customizable oxide-nitride-oxide (ONO) stack over a substrate in an in-situ atomic layer deposition (ALD) tool or chamber. Radical oxid...  
WO/2024/066114A1
The present invention provides a three-dimensional integrated system compatible with a chip and a manufacturing method therefor. At least one functional chip is extended to form extension chips comprising the functional chip and peripher...  
WO/2024/070967A1
A signal transmission device comprising a first chip, which includes a first transformer, a second chip, a plurality of first lead terminals, a plurality of second lead terminals, chip-to-chip wires which electrically connect the first c...  
WO/2024/070843A1
Provided is a substrate processing method for processing a substrate by supplying a gas from a gas supply unit into a substrate processing space in a substrate processing apparatus. The gas supply unit comprises a plurality of gas source...  
WO/2024/071573A1
A method for forming an oxide film by using a deposition apparatus, according to an embodiment of the present invention, comprises the steps of: (a) depositing a first thin film composed of a nitride film on a substrate; (b) spraying OH ...  
WO/2024/066425A1
The present invention provides a wafer conveying system. The wafer conveying system comprises a wafer library, a manipulator, a wafer loading deviation detection module, and a wafer loading deviation compensation module; the manipulator ...  
WO/2024/072851A1
An example method includes fonning and patterning an etch assist layer on a first dielectric layer such that the etch assist layer is not over a first bond pad (504); forming and patterning a first photoresist layer on a second patterned...  
WO/2024/070786A1
Provided are: a resist underlayer film-forming composition which enables the formation of a resist underlayer film having excellent resist pattern rectangularity when the composition is exposed to extreme ultraviolet ray; and a method fo...  
WO/2024/066309A1
The present application relates to an electronic electroplating chip having a through-silicon via which has a high aspect ratio and a preparation method. The method comprises the following steps: S1: coating a photoresist on a surface of...  
WO/2024/069340A1
The present invention provides a semiconductor device which comprises a transistor of a very small size. This semiconductor device comprises first and second transistors; the first transistor comprises first to third conductive layers, a...  
WO/2024/070915A1
The purpose of one aspect of the present invention is to provide a resin that has liquid repellency and high solubility in alkaline solution, the resin being rendered insoluble in solvents through photocrosslinking at a low exposure leve...  
WO/2024/065862A1
The present application relates to a wafer handling device, comprising a cylinder assembly and a cover assembly. The cylinder assembly comprises a cylinder block, and a lifting rod, which is movably connected to the cylinder block in a l...  
WO/2024/069816A1
Provided is an electrostatic chuck assembly the service life of which can be lengthened several fold during use in a vacuum chamber. This electrostatic chuck assembly comprises a disc-shaped ceramic plate with built-in electrodes serving...  
WO/2024/072525A1
An apparatus can include a support structure and a docking station, wherein the apparatus is configured to move the docking station relative to the support structure. The apparatus can further include a head among a plurality of heads. T...  
WO/2024/072670A1
Methods, systems, and media for deposition control in a process chamber are provided. In some embodiments, a method comprises (a) obtaining, at a present time, information indicating a status of one or more components of the process cham...  
WO/2024/070825A1
The present invention provides: a film formation method for forming a film selectively; and a substrate treatment apparatus. Provided is a film formation method for forming, in a substrate having a first surface and a second surface, a...  
WO/2024/067275A1
Disclosed in the present invention are a packaging method for a chip with a high-density connecting layer, and a packaging structure thereof. The method comprises the steps of: S1, preparing a high-density connecting layer with a plurali...  
WO/2024/066247A1
Disclosed are a semiconductor structure and a manufacturing method therefor. The semiconductor structure comprises: a substrate (100) comprising an array region (110) and a peripheral region (120) adjacent to each other; a bit line (101)...  
WO/2024/067997A1
In one embodiment, the semiconductor device (1) comprises a semiconductor body (2), a gate electrode (33) and a first electrode (31), wherein - the semiconductor body (2) comprises a first region (21) which is a source region or an emitt...  
WO/2024/072816A1
Described herein is a method for selectively oxidizing a substrate. The method includes forming a non-conformal layer on at least one side surface of a trench or a hole of a substrate. After forming the non-conformal layer, the at least ...  

Matches 601 - 650 out of 818,524