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WO/2024/060261A1 |
The present application discloses a semiconductor device and a preparation method therefor, a power conversion circuit and a vehicle. The semiconductor device comprises: an N-type semiconductor substrate, an epitaxial layer, a trench str...
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WO/2024/062297A1 |
A semiconductor structure includes a front-end-of-line level including a plurality of field effect transistors electrically connected to a back-end-of-line interconnect level. The back-end-of-line interconnect level is located on a first...
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WO/2024/060740A1 |
Provided in the embodiments of the present application is an IGBT device. The IGBT device comprises a collector electrode; an electric-field termination layer formed on the collector electrode; an electric-field transition layer formed o...
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WO/2024/064324A1 |
Transistor devices are provided. In one example, the transistor device includes a channel layer. The transistor device includes a multilayer barrier structure on the channel layer. The multilayer barrier structure includes a first Group ...
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WO/2024/060260A1 |
Disclosed in the present application are a semiconductor device, a preparation method, a power conversion circuit and a vehicle. The semiconductor device comprises: an N-type semiconductor substrate, a first epitaxial layer, a plurality ...
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WO/2024/060110A1 |
A nitride-based semiconductor device includes a first III-V nitride-based semiconductor layer, a second III-V nitride-based semiconductor layer, a source electrode and a drain electrode, and a doped nitride-based semiconductor layer. The...
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WO/2024/062789A1 |
This semiconductor device comprises: a first compound semiconductor; a first electrode arranged on the first compound semiconductor and connected to the first compound semiconductor by Schottky contact; a second compound semiconductor ar...
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WO/2024/060333A1 |
Provided in the embodiments of the present disclosure are a semiconductor structure and a method for forming the same. The method comprises: providing a substrate, the substrate comprising active strips and first trenches extending in a ...
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WO/2024/064146A1 |
This application is directed to integrating metal oxide semiconductor (MOS) transistors and Schottky barrier diodes (SBDs). An integrated planar semiconductor device includes a substrate, an SBD joining an SBD semiconductor and a barrier...
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WO/2024/060083A1 |
Embodiments of the present application relate to the technical field of semiconductors, and provide a semiconductor device and a manufacturing method therefor, and an electronic device. The semiconductor device comprises a substrate, a c...
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WO/2024/061038A1 |
A super-junction LDMOS device and a method for manufacturing same. A super-junction LDMOS device (100) comprises: a substrate (20); an epitaxial layer (21), which covers the surface of one side of the substrate (20); a body region (28) a...
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WO/2024/061264A1 |
Embodiments of the present disclosure relate to a semiconductor device and a manufacturing method therefor. The semiconductor device comprises: a semiconductor body, comprising a substrate, a buried layer, and an epitaxial layer, wherein...
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WO/2024/064565A2 |
Vertical channel field-effect transistors (VCFETs) with reduced contact resistance and/or parasitic capacitance, and related fabrication methods. In exemplary aspects, to reduce contact resistance of the VCFET, an end portion of the vert...
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WO/2024/062978A1 |
A magnetoresistive element according to one embodiment of the present disclosure comprises a multilayer structure, a memory layer disposed on the multilayer structure and changeable in magnetization direction, a nonmagnetic layer dispose...
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WO/2024/063826A2 |
Embodiments relate to a transistor having a substrate and a gate formed in or on a surface of the substrate. The gate can include a piezoelectric material. The transistor has a drain and a source formed in or on a surface of the gate. Th...
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WO/2024/062256A1 |
A monolithic array of semiconductor devices on a wafer comprises a first semiconductor device occupying a first device area on the wafer above a first porous region in the wafer. The first porous region has a first structure, a first por...
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WO/2024/064145A1 |
This application is directed to integrating field-effect transistors (FETs) and Schottky barrier diodes (SBDs) on a substrate and forming an integrated and planar semiconductor device. A P-type Metal Oxide Semiconductor (PMOS) transistor...
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WO/2024/064326A1 |
Transistor devices are provided. In one example, the transistor device includes a channel layer. The transistor device includes a multilayer barrier structure on the channel layer. The transistor device includes a gate contact having a g...
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WO/2024/062664A1 |
Provided is a semiconductor device which has, during an OFF time, a carrier discharge path that is provided in an IGBT, and increases an IE effect while assuring breakdown resistance against avalanches, and is thereby capable of reducing...
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WO/2024/062829A1 |
In the present invention, a transistor comprises a collector layer, a base layer, and an emitter layer stacked in this order on an upper surface, which is one surface of a substrate. Four or more emitter electrodes are electrically conne...
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WO/2024/060262A1 |
The present application discloses a semiconductor device, a manufacturing method, a power conversion circuit, and a vehicle. The semiconductor device comprises: an N-type semiconductor substrate, a first epitaxial layer, multiple gate tr...
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WO/2024/060366A1 |
Provided in the present application is a display panel. The display panel comprises a substrate, and a first ohmic contact structure, a first boss, a second ohmic contact structure, a semiconductor structure and a gate, which are stacked...
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WO/2024/060646A1 |
A semiconductor device includes a nanosheet stack on a substrate. A first source/drain is on a first side of the nanosheet stack and a second source/drain is on an opposing side of the nanosheet stack. A backside contact includes a first...
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WO/2024/060514A1 |
A display panel (100). The display panel (100) comprises a substrate (11) and a thin film transistor (101) provided on the substrate (11). The thin film transistor (101) comprises: a first gate (14), comprising a first inclined side surf...
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WO/2024/060220A1 |
A nitride-based semiconductor device includes a nitride-based semiconductor structure, a doped nitride-based semiconductor layer, and a gate electrode. The nitride-based semiconductor structure has an active region and an isolation regio...
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WO/2024/064797A1 |
Disclosed are apparatuses including transistor and methods for fabricating the same. The transistor may include a source/drain (120) substantially enclosed in a source/drain silicide layer (124), wherein an integral source/drain via port...
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WO/2024/064567A2 |
In an aspect, a transistor comprises a gate structure having a metal gate, a dielectric layer at least partially surrounding the metal gate, a metal cap over a portion of the metal gate that is not surrounded by the dielectric layer, and...
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WO/2024/063588A1 |
The present invention relates to a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device, according to an embodiment, may comprise the steps of: forming a thin film structure on a substrate;...
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WO/2024/063744A2 |
The present invention relates to a method (100) for enabling the use of an liquid-air interface in order to create the colloidal quantum well film desired to be created on a substrate surface.
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WO/2024/055667A1 |
The present application provides a capacitor structure, a capacitor array, a memory, and an electronic device. The capacitor structure comprises at least one field effect transistor having connected first and second electrodes. The field...
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WO/2024/056193A1 |
A method for manufacturing a SiC semiconductor element (10), comprising the steps of providing a SiC substrate (20) with a SiC epitaxial layer (30) on top, treating the SiC epitaxial layer (30) with plasma immersion ion implantation (PII...
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WO/2024/055885A1 |
Provided in the present application are a semiconductor device and a preparation method therefor, which realize ohmic contact between a first electrode layer and an epitaxial layer, reduce the contact resistivity of ohmic contact, are co...
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WO/2024/058355A1 |
The present invention relates to: a semiconductor device having, as a gate dielectric layer, an amorphous fluorinated carbon thin film that has a high dielectric constant, low leakage current, and high insulation strength and is thus use...
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WO/2024/058824A1 |
A processing system includes one or more processing chambers, and a system controller configured to cause the processing system to perform (a) a pre-clean process on exposed surfaces of a semiconductor structure, the semiconductor struct...
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WO/2024/055422A1 |
The present disclosure relates to a semiconductor structure and a forming method thereof, and an operation method of the semiconductor structure. The semiconductor structure comprises: a substrate; a storage array comprising a plurality ...
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WO/2024/055294A1 |
The present disclosure provides a semiconductor device and a method of manufacturing the same. In some embodiments, the semiconductor device includes: a substrate; a first nitride semiconductor layer on the substrate; a second nitride se...
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WO/2024/055371A1 |
Disclosed in the embodiments of the present disclosure are a semiconductor structure and a manufacturing method therefor, and a memory. The semiconductor structure comprises: a substrate; a stacked structure, located on the substrate and...
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WO/2024/058180A1 |
The present invention relates to a substrate (1) which is for forming a semiconductor device, and has: a diamond substrate (10); and a silicon carbide layer (20) disposed on a portion or the entirety of one surface (10a) of the diamond s...
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WO/2024/057165A1 |
Provided is a storage device which can be micro-fabricated or highly integrated. This storage device has a plurality of memory cells, a first insulator, and a second insulator disposed on the first insulator. Each of the memory cells has...
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WO/2024/058140A1 |
This semiconductor device is provided with: a semiconductor substrate (10) which has a main surface (10a); a drift layer (31) of a first conductivity type, the drift layer being formed in a main surface (10a)-side surficial part; a drain...
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WO/2024/056344A1 |
A nanosheet diode includes a bookend structure and a central structure. The bookend includes a first semiconductor that is doped as one of the anode and the cathode of the diode, and includes a left block, a right block, and a first stac...
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WO/2024/056345A1 |
A semiconductor structure is provided that includes a first FET device region including a plurality of first FETs, each first FET of the plurality of first FETs includes a first source/drain region (28) located on each side of a function...
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WO/2024/057654A1 |
The present invention provides a semiconductor device with a vertical, the vertical element having drift region of a first conductivity type provided on a semiconductor substrate, a first injection portion provided below the drift region...
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WO/2024/055613A1 |
Disclosed is a novel-topology HEMT device, comprising: a substrate, a semiconductor layer, and a plurality of basic units. In a direction perpendicular to the plane where the substrate is located, an orthographic projection of the shorte...
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WO/2024/057168A1 |
The present invention provides a semiconductor device which achieves both low power consumption and high performance. This semiconductor device comprises a first conductive layer, a second conductive layer, a first semiconductor layer, a...
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WO/2024/039853A9 |
In some embodiments, an integrated circuit includes multiple charge storage regions configured to receive charge carriers from a photodetection region in response to a single excitation of a sample. In some embodiments, an integrated cir...
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WO/2024/057671A1 |
Provided are: a sputtering target for oxide semiconductor thin film formation with which can be formed an oxide semiconductor thin film suitable for an active layer with both high mobility and a high band gap; a method for producing the ...
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WO/2024/055276A1 |
The nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a gate electrode, an ohmic electrode, a first field plate, and a second field plate. The second nitrid...
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WO/2024/055902A1 |
The present invention provides a JBS diode structure and a preparation method therefor. The JBS diode structure comprises a first conductive type substrate, a first conductive type epitaxial layer, second conductive type well regions, a ...
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WO/2024/055776A1 |
An HEMT contact hole structure and a preparation method therefor. The HEMT contact hole structure comprises a substrate (11), a buffer layer (12), a channel layer (13), a barrier layer (14), and contact holes (143). The buffer layer (12)...
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