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WO/2023/224596A1 |
Various embodiments comprise systems, methods, architectures, mechanisms, apparatus, and improvements thereof for scaling and summing a plurality of weighted-data-representative analog signals provided by columns of in-memory computing b...
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WO/2023/224917A1 |
Methods and systems for generating trim-pass metadata for high dynamic range (HDR) video are described. The trim-pass prediction pipeline includes a feature extraction network followed by a fully connected network which maps extracted fe...
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WO/2023/220976A1 |
Disclosed in the present application is a data storage method. The data storage method comprises: writing data into a first cache region and a second cache region of a page cache; writing data in a third cache region of the page cache, w...
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WO/2023/223693A1 |
A recording medium according to the present disclosure comprises a recording layer containing an organic compound having nonlinear light absorption properties, and the organic compound has a molar absorption coefficient of at least 90 mo...
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WO/2023/216692A1 |
The present disclosure relates to a molecular module assembly device and a molecular module assembly method. The molecular module assembly device comprises a plurality of microfluidic devices, the plurality of microfluidic devices being ...
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WO/2023/216789A1 |
The present application relates to the technical field of semiconductors and provides a one-time programmable memory and a control method therefor, a storage system, and an electronic device, for use in solving the problems that the area...
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WO/2023/219545A1 |
A fingerprint sensor, comprising fingerprint sensing circuitry configured to sense a fingerprint of a finger, and to provide a representation of the fingerprint; a sensor interface coupled to the fingerprint sensing circuitry, and compri...
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WO/2023/216357A1 |
The present disclosure relates to the technical field of memory testing, and in particular, to a test method and test apparatus for a memory, an electronic device, and a computer readable storage medium. The test method for a memory comp...
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WO/2023/220157A1 |
A suspension assembly includes a baseplate having an upper surface and a lower surface opposite the upper surface, a load beam mounted to the baseplate, a cylindrical hub extending from the upper surface, wherein the cylindrical hub comp...
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WO/2023/219413A1 |
A method for modifying audio content for a listener is disclosed. The method includes, determining a crisp emotion value defining an audio object emotion for each audio object. The method includes determining a composition factor represe...
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WO/2023/218279A1 |
Provided is a semiconductor device that has a high storage density and is highly reliable. The semiconductor device comprises first to third layers that are laminated. The first layer includes a delay signal generation circuit and a row ...
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WO/2023/219813A1 |
Technology is disclosed herein for a memory system that compensates for different programming speeds in two sets of memory cells when reading those two sets of memory cells. The memory system programs a group of the memory cells to one o...
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WO/2023/217281A1 |
Disclosed in the present application are a repair method in a phase change storage apparatus, and a phase change storage apparatus and an electronic device. The method comprises: determining that a target phase change storage unit requir...
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WO/2023/219960A1 |
A filter assembly has a housing. The housing has an inner body and an outer body surrounding at least a portion of the inner body. The inner body has a base extending in a lateral direction and a first sidewall extending axially outward ...
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WO/2023/201715A9 |
A gate driving circuit, a display panel, a driving method, and a display apparatus. A gate driving circuit (110) comprises an input module (11), a pull-up node (PU), an output module (12), a first pull-down node (PD1), a first pull-down ...
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WO/2023/219812A1 |
Aspects of a storage device are provided that apply advanced thermal throttling with multi-tier extreme thermal throttling. Initially, a controller determines whether a first temperature measurement indicates that a temperature of the me...
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WO/2023/216316A1 |
The present invention provides a driving circuit and a driving method therefor, and a memory. The driving circuit comprises a word line driving circuit and a first control circuit; the word line driving circuit comprises an input end, an...
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WO/2023/215940A1 |
A method for control and transfer of audio between analog and computer in digital audio processing including one or a combination of a. controlling data by converting to-and-from analog to control the analog circuit and b. time correctio...
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WO/2023/219972A1 |
A system for analyzing laser beam characteristics in high-speed laser motion systems, wherein the high-speed laser motion systems comprise multiple lasers each having a field of view that generates non-stationary laser beams and a build ...
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WO/2023/216751A1 |
The present application relates to a memory check pin processing method and apparatus, a device, a storage medium, and a computer program product. The method can be applied to an application scene of a cloud technology and a vehicle-moun...
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WO/2023/216385A1 |
Provided in the present application are a command processing circuit and a data processing circuit. The command processing circuit comprises a plurality of triggers, wherein an output end of the previous trigger is connected to an input ...
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WO/2023/214740A1 |
The present invention provides an audio output system and method. The audio output system comprises: an audio output device, which outputs sound content for auditory stimulation of infants; a user terminal into which voice data of a user...
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WO/2023/214742A1 |
An audio output system and a sound content change method thereof are provided. The audio output system according to an embodiment is an audio output system comprising: an audio output device configured to output a sound content for audit...
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WO/2023/212879A1 |
Disclosed in embodiments of the present disclosure are an object audio data generation method and apparatus, an electronic device, and a storage medium. The method comprises: obtaining sound data of at least one sound object; obtaining c...
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WO/2023/215382A1 |
A dynamic random access memory (DRAM) device may include an array of DRAM cells, with each DRAM cell configured to store a high logic voltage and a low logic voltage. The DRAM device may further include a precharge circuit configured to ...
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WO/2023/212986A1 |
A test circuit checking method, a test platform (30), a storage medium and a test system (50). The test circuit checking method comprises: sending a control signal to a test circuit (501), and determining a test mode signal, which is out...
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WO/2023/215063A1 |
Selective refresh techniques for memory devices are disclosed. In one aspect, a memory device that is used with an application that has frequent repeated read or write commands to certain memory segments may be able to set a flag or simi...
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WO/2023/214741A1 |
An audio output system is provided. The audio output system comprises: a key device which includes a communication tag; a main device which stores a first playlist and outputs audio content associated with the communication tag on the ba...
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WO/2023/214739A1 |
An audio output system and method are provided. An audio output system according to some embodiments comprises: an audio output device for outputting different audio contents according to a sound doll; a user terminal for controlling the...
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WO/2023/215052A1 |
Reciprocal quantum logic (RQL) bias-level sensors are fabricated on an RQL integrated circuit (IC) to sample AC or DC bias values provided to operational RQL circuitry on the RQL IC. The bias-level sensors, or samplers, include Josephson...
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WO/2023/213014A1 |
Disclosed are an anti-fuse structure and a manufacturing method therefor, an anti-fuse array and a storage device. The anti-fuse structure comprises: a substrate comprising a first doped region and a second doped region; a first gate and...
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WO/2023/206219A1 |
Provided in the present disclosure are a drive circuit, a drive method, and a display apparatus. The drive circuit comprises a first pull-down node, a first control circuit, and a pull-up node reset circuit, wherein the first control cir...
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WO/2023/206744A1 |
A signal control circuit (10), a signal control method, and a semiconductor memory. The signal control circuit (10) comprises: a generation module (11), used for accumulating the number of times of execution of an activation operation, a...
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WO/2023/211616A1 |
Example systems, computer readable medium and methods include receiving a video taken from a drone where the drone followed a flight path based on a flight plan. A user interface is presented that provides options for the user to select ...
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WO/2023/206748A1 |
The present disclosure provides a data writing method for a memory array, a test method for a memory array, a data writing apparatus for a memory array, a computer readable medium, and an electronic device. The data writing method compri...
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WO/2023/211617A1 |
Example systems, computer readable medium and methods for automatically generating portrait videos from landscape videos include receiving a landscaped video, identifying one or more objects to track, and tracking the one or more objects...
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WO/2023/206749A1 |
A calibration control circuit (10), an electronic device, and a calibration control method. The calibration control circuit (10) comprises an off-chip calibration module (11) and a mode switching module (13), and the off-chip calibration...
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WO/2023/212429A1 |
A storage device reclassification system includes a storage device reclassification subsystem coupled to a storage device that has a NAND storage subsystem and that is configured to perform first storage operations associated with a firs...
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WO/2023/212117A1 |
An apparatus disclosed herein comprises: a plurality of memory cells and a control circuit coupled to the plurality of memory cells.The control circuit is configured to: acquire a first set of read levels on a wordline of a first block o...
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WO/2023/210382A1 |
In the present invention, a processor acquires a first signal based on a first result of the servo pattern being read by a first servo read element while the first servo read element is located on the reference area of magnetic tape, acq...
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WO/2023/207806A1 |
A shift register, a gate driving circuit and a display apparatus. The shift register comprises a first control module (10), a first output module (20), a second output module (30), a second control module (40), a third control module (50...
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WO/2023/207543A1 |
A media content publishing method and apparatus, and a device, a storage medium and a program product. The method comprises: in response to a publishing page display operation acting on a photographic page, switching the current display ...
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WO/2023/206752A1 |
Disclosed in the embodiments of the present disclosure are a test method and test system for a memory. The method comprises: providing a memory, wherein the memory at least comprises a plurality of first storage units and a plurality of ...
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WO/2023/208571A1 |
A data storage medium (2) comprising a stacked plurality of layers (9), each layer composed of a layer material selected from a group comprising at least two different dielectric materials, adjacent layers being formed of different mater...
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WO/2023/206152A1 |
An anti-fuse memory, for use in increasing a read success rate of the anti-fuse memory. The anti-fuse memory comprises a storage unit, a bit line, a word line, and a write line. The storage unit comprises an active region, and a selectio...
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WO/2023/212568A1 |
An integrated circuit (IC) may include a memory device and a circuit coupled with the memory device. The circuit may precondition the memory device to sustain oscillations, initiate first oscillations in a first loop that includes the me...
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WO/2023/210643A1 |
[Problem] To provide a hardware accelerator processor for full-text search. [Solution] Provided is a full-text search processor comprising: a character storage element in which text data to be searched is temporarily stored such that eac...
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WO/2023/209485A1 |
Provided is a semiconductor device having a small circuit size and reduced power consumption. This semiconductor device includes first to fifth circuits. Each of the first to fourth circuits has first and second cells, a sixth circuit, f...
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WO/2023/207380A1 |
Embodiments of the present application relate to a calibration circuit and method and a related device. The circuit is electrically connected to a ZQ port, and a reference resistor corresponding to the ZQ port is grounded; the circuit co...
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WO/2023/209491A1 |
Provided is a semiconductor device that has a novel structure. The present invention has: a base die that has a clock signal generation circuit and a first synchronization circuit provided thereto; and a plurality of dies that are layere...
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