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WO/2017/150617A1 |
Provided is a thin film in which the semiconductor characteristics of an In-Ga-Zn-O-based oxide are reversible, and a method of manufacturing the same. A semiconductor/insulator reversible-change thin film comprising an In-Ga-Zn-O-based ...
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WO/2017/144855A1 |
According to one embodiment of the present disclosure, a device comprises a latching circuitry, where the latching circuitry comprises at least one correlated electron switch, hereinafter termed CES, element. The latching circuitry furth...
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WO/2017/139410A1 |
Some features pertain to an integrated device that includes a die and a first redistribution portion coupled to the die. The first redistribution portion includes at least one dielectric layer and a capacitor. The capacitor includes a fi...
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WO/2017/137269A1 |
With a micro-electronic electrode assembly (1) having a first electrode (3) arranged on a substrate (2), wherein the first electrode (3) has a thin layer made of a first electrode material having a solid state lattice, wherein the first ...
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WO/2017/127205A1 |
A tunable bus-mediated coupling system is provided that includes a first input port coupled to a first end of a variable inductance coupling element through a first resonator and a second input port coupled to a second end of the variabl...
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WO/2017/126664A1 |
A microswitch configured from a first electrode, a second electrode, and a porous polymer metal complex conductor, wherein the microswitch is characterized in that the porous polymer metal complex conductor is expressed by formula (1) be...
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WO/2017/123332A1 |
An integrated radio frequency (RF) circuit structure may include a resistive substrate material and a switch. The switch may be arranged in a silicon on insulator (SOI) layer supported by the resistive substrate material. The integrated ...
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WO/2017/119938A1 |
A skewed, co-spiral inductor structure includes a first trace (410) arranged in a first spiral pattern that is supported by a substrate. The skewed, co-spiral inductor structure also includes a second trace (420) arranged in a second spi...
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WO/2017/112397A1 |
An exemplary MIM capacitor may include a first metal plate, a dielectric layer on the first metal plate, a second metal plate on the dielectric layer, a via layer on the second metal plate, and a third metal plate on the via layer where ...
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WO/2017/100237A1 |
The teachings of the present disclosure may be applied to the manufacture and design of capacitors. In some embodiments of these teachings, a capacitor may be formed on a heavily doped substrate. For example, a method for manufacturing a...
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WO/2017/095678A1 |
A method used in forming an electronic component comprising conductive material and ferroelectric material comprises forming a non-ferroelectric metal oxide-comprising insulator material over a substrate. A composite stack comprising at ...
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WO/2017/086399A1 |
According to the present invention, electrode layers 24, 26 are connected to a bismuth ferrite layer 22 by being arranged so as to sandwich the bismuth ferrite layer 22 from a direction that is perpendicular to the c-axis of a bismuth fe...
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WO/2017/085173A1 |
The invention relates to a nickel electrode, comprising an electrically conductive nickel sheet and a nickel layer applied thereto consisting of spherical, porous nickel particles adhering to each other, obtainable by a method comprising...
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WO/2017/066309A1 |
Methods of processing a substrate include: providing a substrate having a polymer dielectric layer, a metal pad formed within the polymer dielectric layer and a first metal layer formed atop the polymer dielectric layer; depositing a pol...
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WO/2017/059104A1 |
Example methods and mechanisms are described herein for implementing and adiabatically operating a topological quantum computing (TQC) phase gate that complements the existing Clifford operations, and thereby allows universal quantum com...
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WO/2017/057046A1 |
The present art relates to a semiconductor device capable of improving yield. A volatile logic circuit of the present invention has a storage node, and stores inputted information. A plurality of nonvolatile elements are connected to the...
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WO/2017/051527A1 |
The purpose of the present invention is to enable manufacture of a metal-precipitating resistance changing element in which variations in program voltage and high-resistance-state leak current are decreased while decreasing the program v...
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WO/2017/052813A1 |
Embodiments of the invention include inductors integrated into a package substrate that have increased thicknesses due to the use of shaped vias, and methods of forming such packages. In an embodiment of the invention an inductor may be ...
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WO/2017/048369A1 |
An augmented capacitor structure includes a substrate and a first capacitor plate of a first conductive layer on the substrate. The augmented capacitor structure also includes an insulator layer on a surface of the first capacitor plate ...
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WO/2017/041936A1 |
The invention relates to a method for producing a trench capacitor (2), comprising the steps of providing a substrate (200), which has a front side (201) and a back side (202), producing a trench structure having trenches (210) on the fr...
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WO/2017/043011A1 |
According to an embodiment of the present invention, a secondary battery manufacturing method is a method for manufacturing a secondary battery having a plurality of unit cells 21 that are connected in parallel. The method is provided wi...
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WO/2017/038095A1 |
The purpose of the present invention is to provide a method for efficiently performing characterization of a programmable logic integrated circuit having a crossbar switch involving the use of a resistance change element, in order to per...
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WO/2017/038008A1 |
An oxide semiconductor secondary battery according to the present embodiment is provided with: a first electrode (14); an n-type metal oxide semiconductor layer (16) formed on the first electrode (14); a charge layer (18) that is formed ...
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WO/2017/025760A1 |
The present techniques generally relate to apparatus and methods for providing programmable currents for correlated electron switches.
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WO/2017/021721A1 |
Subject matter disclosed herein relates to correlated electron switches.
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WO/2017/018706A1 |
The embodiment of the present invention relates to a method for manufacturing a capacitor having a high dielectric constant, which can prevent surface deterioration of a dielectric film due to a vacuum break and prevent the quality of th...
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WO/2017/007555A1 |
An integrated circuit structure (100) includes: a semiconductor substrate (102); a shallow trench isolation (STI) region (106) in the semiconductor substrate (102); one or more active devices formed on the semiconductor substrate (102); ...
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WO/2017/002284A1 |
Provided is a battery having desired characteristics, and a charging/discharging method. A battery according to an embodiment of the present invention is provided with: a first electrode layer (6); a second electrode layer (7); and a cha...
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WO/2017/004316A2 |
Copper (Cu) grain boundaries can move during a thermal cycle resulting in the Cu grain position being offset. Such Cu pumping can disturb the surface of a bottom metal, and can physically break a dielectric of a metal-insulator-metal (MI...
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WO/2016/208116A1 |
A secondary battery manufacturing method according to the present invention is a method for manufacturing a secondary battery which includes a charging layer that captures electrons by forming energy levels in a band gap by causing a pho...
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WO/2016/203751A1 |
Provided is a rectifying element wherein current-voltage characteristics are improved. The rectifying element has: a first electrode and a second electrode; a rectifying layer that is provided between the first electrode and the second e...
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WO/2016/205604A1 |
Disclosed is a method for manufacturing a thin film resistor after completing a copper chemical mechanical polishing (CMP) process on a copper process module including the steps of: depositing a dielectric barrier layer (100) across at l...
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WO/2016/205078A2 |
A three dimensional memory device includes a memory device region containing a plurality of non-volatile memory devices, a peripheral device region containing active driver circuit devices, and a stepped surface region between the periph...
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WO/2016/199556A1 |
Provided is a memory device having a structure suitable for higher integration while ensuring ease of manufacture. The memory device is provided with n memory cell units which are layered on a substrate successively from a first memory c...
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WO/2016/199412A1 |
In order to improve the number rewrites by improving the dielectric breakdown resistance of an ion conducting layer in a variable resistance element, this variable resistance element is provided with: a first electrode that contains at l...
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WO/2016/181609A1 |
Disclosed is a semiconductor storage device (1000) wherein: a first selection line (108) and a second selection line (109) are provided; a first storage element (100) of a plurality of storage elements has a first upper electrode (101) a...
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WO/2016/163120A1 |
In the cases of performing programming by forming a two-terminal-type variable resistance element on a semiconductor device, it has been difficult to control the programming, and malfunctions have often occurred. This switching element i...
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WO/2016/164666A1 |
A method for forming a semiconductor structure having a transistor device with a control electrode (20) for controlling a flow of carriers between a first electrode (16) and a second electrode (18) includes a passivation layer (24) with ...
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WO/2016/158430A1 |
A switch element according to one embodiment of the present technique is provided with: a first electrode; a second electrode that is arranged to face the first electrode; and a switch layer that is arranged between the first electrode a...
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WO/2016/157820A1 |
Provided is a switching element in which it is made possible to improve ON-state retention performance and reduce OFF-state leak current. This switching element has a first electrode, a second electrode, and a resistance change layer pro...
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WO/2016/158429A1 |
A switch element according to one embodiment of the present technique is provided with: a first electrode; a second electrode that is arranged to face the first electrode; and a switch layer that is arranged between the first electrode a...
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WO/2016/133685A2 |
An upper planar capacitor is spaced above a lower planar capacitor by a dielectric layer. A bridged-post inter-layer connector couples the capacitances in parallel, through first posts and second posts. The first posts and second posts e...
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WO/2016/129306A1 |
This selective element is provided with: a first electrode and a second electrode that is arranged so as to face the first electrode; a switch element that is provided between the first electrode and the second electrode; and a nonlinear...
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WO/2016/117225A1 |
A memory cell is provided with: an antifuse inserted into each of a plurality of paths, said paths being connected to each other at one end thereof; a resistive element that is inserted into at least one of the plurality of paths; and a ...
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WO/2016/116429A1 |
A coil array includes a first bar (701, 801) comprising a first gap (820) and a first winding (703, 821) around the first bar, a second bar (711, 803) comprising a second gap and a second winding (713) around the second bar, a lid elemen...
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WO/2016/114311A1 |
The forming voltage of a resistance change element used in a non-volatile memory and the like is decreased, and repetition characteristics are improved. In an element structure in which a metal oxide film 12 is sandwiched between a lower...
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WO/2016/106197A2 |
Metal-insulator-metal (MIM) capacitors arranged in a pattern to reduce inductance, and related methods, are disclosed. In one aspect, circuits are provided that employ MIM capacitors coupled in series. The MIM capacitors are arranged in ...
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WO/2016/084349A1 |
The objective of the present invention is to make it possible to manufacture, with a high yield, a metal deposition type variable-resistance element with which variability in a leakage current under a program voltage and a high resistanc...
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WO/2016/079498A1 |
The present invention relates to a method of forming a fluorine-doped metal oxide dielectric layer suitable for forming a dielectric barrier layer in an integrated circuit device. The method comprises the deposition of a plurality of lay...
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WO/2016/080146A1 |
This semiconductor device is provided with: a flip flop circuit which has an annular structure wherein a first inverter circuit, a first connection line comprising a first node, a second inverter circuit, and a second connection line com...
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