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WO/2016/140071A1 |
The disclosure of the present invention relates to a compression encoding device, a compression encoding method, a decoding device, a decoding method and a program which are able to provide no-loss compression technology with a higher co...
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WO/2016/140771A1 |
A method and an apparatus for splitting a switched capacitor integrator of a delta-sigma modulator are provided. The apparatus configures a first integrator and a second integrator to be coupled in parallel to each other, switches betwee...
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WO/2016/137646A1 |
In one embodiment, a method for converting an input digital signal into an analog signal is provided. The method comprises modulating the input digital signal into a modulated digital signal, and converting the modulated digital signal i...
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WO/2016/131990A1 |
The invention relates to a sigma-delta converter comprising a sigma-delta modulator suitable for generating a series of binary samples (BS (k)) representative of an analog input signal (Vin) to be digitized, in which at least one analog ...
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WO/2016/112754A1 |
Apparatus and methods are taught for dividing a signal to be processed by a Noise Shaping (Hereafter NS) loop into smaller sections, and applying NS to at least a subset of these smaller sections. The processed signals are then recombine...
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WO/2016/115422A1 |
Embodiments of an apparatus for direct coupling of a capacitive sensor to a delta-sigma converter are described. One apparatus includes a sensor, a charge coupling circuit configured to transfer at least a portion of charge generated by ...
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WO/2016/115129A1 |
A sigma-delta analog to digital converter (ADC) in accordance with embodiments includes an M-bit digital-to-analog converter (DAC); a loop filter coupled to receive an output from DAC; and a variable level quantizer configured to provide...
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WO/2016/103825A1 |
This analog-to-digital converter 4 is provided with: a sample and hold circuit 6 to which an analog input signal is input; and a band-pass type ΔΣ modulator 7 which subjects the output signal outputted by the sample and hold circuit 6 ...
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WO/2016/103981A1 |
This ΔΣ modulator is provided with: a loop filter 30; a quantizer 36 that generates quantized data on the basis of the output of the loop filter 30; an internal pathway 42 that is connected to the loop filter 30 or the quantizer 36; an...
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WO/2016/088317A1 |
The purpose of the present invention is to provide a high-power-efficiency and low-design-cost transmission device by implementing, with a constant clock, delta-sigma modulation maintaining a zero current switching property in an amplifi...
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WO/2016/077192A1 |
A phase accumulator style circuit generates an output stream of pulses. The density of the pulse stream is proportional to the input data value relative to the maximum value supported by the bit width of an adder. The output pulse densit...
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WO/2016/073930A1 |
An RF transmitter module for a cellular radio that includes a delta-sigma modulator having a plurality of interleaving dynamic element matching (DEM) circuits providing interleaved digital bits at a reduced clock rate. An interleaver con...
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WO/2016/073925A1 |
A cellular radio architecture that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a multiplexer having signal paths that include a bandpass filter that pas...
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WO/2016/063038A1 |
A modulator circuit is disclosed which comprises a plurality of signal processing branches, each branch comprising a modulator for performing a delta-sigma modulation of a respective data stream portion in order to generate a modulated s...
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WO/2015/200267A9 |
A system may include a delta-sigma analog-to-digital converter and a digital compression circuit. The delta-sigma analog-to-digital converter may include a loop filter having a loop filter input configured to receive an input signal and ...
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WO/2016/051710A1 |
This invention makes it possible to efficiently improve the signal-to-noise power ratio of a delta-sigma modulator without increasing the operating frequency. A digital modulation device 40 is provided with: a setting unit 41 that sets m...
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WO/2016/044912A1 |
A transmission apparatus for a wireless device, comprising: an antenna for receiving an original signal and for backscattering a modulated signal containing information from the wireless device; a variable impedance coupled to the antenn...
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WO/2016/043592A1 |
A phase-domain delta-sigma (ΔΣ) modulator in a phase digitizer determines a demodulated phase error based on a phase-modulated frequency signal, in which a carrier frequency is modulated with a fundamental frequency and an associated p...
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WO/2016/039941A1 |
A method and apparatus for a feed-forward delta-sigma modulator are provided. The apparatus includes a first adder configured to receive a feedback signal and an input signal and a first integrator configured to receive an output from th...
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WO/2016/034765A1 |
In accordance with the exemplary embodiments of the invention there is at least an apparatus to perform a method includingreceiving by an analog-to-digital converter a signal; determining whether an in-band blocker is present in the sign...
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WO/2016/036654A1 |
In one embodiment, a circuit includes a quantizer configured to convert an analog input signal to a digital signal. The quantizer includes a first feedback path including a first digital to analog converter (DAC) coupled from an output o...
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WO/2016/004416A9 |
A system and method is disclosed for placing some of the elements of a FIR filter into a high impedance state in certain situations. When it is detected that the signal to an impedance element is the same as the previous value, then the ...
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WO/2016/027002A1 |
An improved analog to digital converter comprises at least one delta sigma analog to digital converter stage and a succession of pipelined analog to digital converter stages. The pipelined analog to digital converter stages may have a sa...
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WO/2016/028650A1 |
Certain aspects of the present disclosure provide various sampling networks for switched-capacitor integrators, which may be used in switched-capacitor analog-to-digital converters (ADCs). Rather than having both an input sampling capaci...
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WO/2016/024439A1 |
The purpose of the present invention is to accurately convert an analog signal to a digital signal. An oscillator generates an oscillation signal having a period corresponding to the signal level of an input analog signal. A current bit ...
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WO/2016/021382A1 |
A digital filter is provided with: integration calculation units (10) in which the data of M channels is subjected to time-division multiplexing, said units (10) being cascade-connected using, as an input, time-division-multiplexed data ...
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WO/2015/199844A1 |
A method of signal processing includes comparing an input signal with one or more positive threshold values and one or more negative threshold values. The method also includes generating an output signal based on the comparison of the in...
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WO/2015/196175A1 |
A delta sigma modulator which has improved dynamic range. The ΔΣ modulator has a plurality of ADCs and a plurality of DACs, the plurality of ADCs and DACs are connected in a loop. The plurality of ADCs are coupled with an incoming anal...
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WO/2015/189150A2 |
A feedback circuit provides a feedback signal to a transducer. The feedback circuit includes an ADC that generates digital representations of a feedback signal, digital controller that identifies adjustments for the feedback, and DAC tha...
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WO/2015/190216A1 |
A digital filter is provided with: a summation calculation unit (10) which operates by a clock having the same sampling frequency (fS) as the sampling frequency of input data, and adds up the input data on a sample-by-sample basis; a fre...
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WO/2015/187832A1 |
Methods, systems, and computer-readable media are disclosed for compression of sequencing data. One method includes receiving waveform data associated with a chemical event occurring on a sensor array, the waveform data including a plura...
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WO/2015/173293A1 |
To convert an analogue signal (TP[i]), such as a voltage read signal from a radiation detector, analogue signals (TP[i]) of different size are successively applied to the input of a delta/sigma converter, it being assumed that the analog...
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WO/2015/174119A1 |
A distortion compensation unit (10) acquires, on the basis of both an analog signal being an output signal obtained from a 1-bit pulse train outputted by a DSM (6) and an IQ signal being an input signal to be inputted to the DSM (6), the...
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WO/2015/169328A1 |
A signal modulation device comprising: an input for receiving a complex input signal (106) comprising an in-phase component signal and a quadrature-phase component signal, a sigma-delta modulator (110) for modulating the complex input si...
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WO/2015/170486A1 |
The present invention suppresses the decline of the signal strength of a higher harmonic component included in the output of a ΔΣ modulator. To this end, a signal processing device is equipped with: a ΔΣ modulator (11) for outputting...
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WO/2015/165538A1 |
A method for generating a symbol mapping table ( 14) in a memory (13) comprises: selecting an initial set of pulse train segments having a time-granularity corresponding to a second oversampling clock rate (F2), determining a frequency-d...
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WO/2015/162691A1 |
This digital analog converter comprises multiple rows of ΔΣ modulation circuits and a serializer which switches between outputting output signals of the multiple ΔΣ modulation circuits. The ΔΣ modulation circuits include an integra...
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WO/2015/144771A1 |
In order to overcome the so-called delayless path problem, a time interleaved delta sigma modulator includes a plurality of paths for respective time interleaved data channels, said paths comprising a feed forward path arrangement, inclu...
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WO/2015/128208A1 |
A delta-sigma modulator (10) comprises a modulator loop (11) and a code generator (12). The modulator loop (11) comprises a loop filter (18). The code generator (12) is configured to generate a generator signal (BS) that is realized as a...
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WO/2015/131120A1 |
In embodiments, a circuit includes a single-ended input coupled to a first input of a differential filter. The differential filter is coupled to an analog to digital converter (ADC), and the single-ended input includes an input DC bias v...
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WO/2015/112513A1 |
A delta-sigma modulator includes a signal subtraction circuit, a loop filter, a quantizer, a digital-to-analog converter (DAC), and a control circuit. The signal subtraction circuit subtracts an analog feedback signal from an analog inpu...
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WO/2015/107091A1 |
Embodiments provide a delta-sigma modulator for delivering an output signal on the basis of an input signal, comprising an integrator circuit, a first digital-analogue converter, a second digital-analogue converter, an analogue-digital c...
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WO/2015/101482A1 |
The invention relates to a system (400) for acquiring images by means of heterodyne digital holography, comprising an image sensor (409) having at least one photodiode coupled to an oversampling analog-digital converter.
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WO/2015/098057A1 |
An integrator (100) comprises: a resistance element (111) that is connected to an input terminal (131); an operational amplifier (120) that receives, via the resistance element (111), an input signal (INP, INN) input from the input termi...
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WO/2015/087476A1 |
This invention has a first integrating circuit (101) that integrates a signal obtained by adding a first feedback signal (F0) and a third feedback signal (F2) to an analog input signal (X), a first quantizer (102) that quantizes an outpu...
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WO/2015/083108A1 |
A delta-sigma analog-to-digital converter for use with multiplexed input channels. The delta-sigma analog-to-digital converter comprising at least one integrator that includes an operational amplifier, a memory element with a leakage pre...
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WO/2015/081853A1 |
The present invention discloses a method and apparatus for implementing a multi-bit Δ-∑ modulation-based digital speaker system. The method comprises: 1) digital format conversion; 2) oversampling interpolation filtering; 3) multi-bit...
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WO/2015/077859A1 |
A method for correcting long-term phase drift of a crystal oscillator in a numerically- controlled oscillator is described. The method includes determining the phase error in an oscillator signal in comparison with an external time base;...
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WO/2015/080801A1 |
An analog-to-digital converter includes a feedback loop that receives a wobble signal having a wobble signal frequency. The feedback loop includes a comparator that receives the wobble signal through a first resistive component at a firs...
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WO/2015/071421A1 |
An electrical circuit comprises a signal processing chain and a control unit. The signal processing chain comprises an integrator designed to integrate an input signal for the duration of an integration time. The control unit is coupled ...
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