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WO/2022/128714A1 |
The invention relates to a power converter comprising a control unit and a power transistor, wherein the control unit provides a modulated alternating voltage in order to actuate the power transistor. In order to satisfy electromagnetic ...
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WO/2022/102200A1 |
According to the present invention, spurious noise is reduced in a noise reduction processing device provided with a loop filter and a quantizer. A difference calculation unit obtains a difference between an input signal and a predeter...
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WO/2022/078739A1 |
For a radio frequency (RF) receiver system (1) for providing magnetic resonance (MR) information from an examination space of a MR imaging system, a solution for increasing the dynamic range of the radio frequency (RF) receiver system (1...
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WO/2022/072915A1 |
A delta-sigma modulator (200) includes a first amplifier (210) having an input, a feedback control input, and an output. The input is a first input of the delta-sigma modulator (200). The delta- sigma modulator further includes a first i...
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WO/2022/072964A1 |
Certain aspects of the present disclosure provide a successive approximation register (SAR) analog-to-digital converter (ADC) implemented with a digital filter for noise shaping. For example, certain aspects provide a circuit for analog-...
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WO/2022/065540A1 |
The present disclosure discloses the structure of a receiver in a wireless communication system. According to one embodiment applicable to the present disclosure, a receiver comprises: a matching unit for aligning phases of radio frequen...
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WO/2022/059060A1 |
This delta-sigma modulator comprises: an integrator (100a) that integrates the differences between input signals (INP, INN) and output signals (OUTP, OUTN) of the delta-sigma modulator; and a clocked comparator (101) that outputs, as the...
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WO/2022/053778A1 |
The application describes method and apparatus for amplification. An amplifier circuit (300) is described for driving a load (101) connected between first and second output nodes (103p, 103n) based on an input signal (Sin). The amplifier...
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WO/2022/044491A1 |
The problem of the present disclosure is to provide an A/D converter in which conversion errors are reduced and which is capable of subjecting a plurality of analog input voltages to A/D conversion by time division. A comparator (7) comp...
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WO/2022/035718A1 |
Systems and methods for improving the efficiency of a rotational dynamic element matching (DEM) for Delta Sigma converters. In some implementations, the systems and methods are provided a for reducing intersymbol interference (ISI) of a ...
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WO/2022/028657A1 |
The present invention relates to a method for testing an analogue-to-digital converter unit (1) which is designed to convert an analogue input signal (100) into a digital output signal (200) by means of delta-sigma modulation, the method...
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WO/2022/023316A1 |
The invention relates to a device (100) for supplying power to an ultrasound transducer (302), comprising a power interface (106) which is configured to supply an analogue power signal, called the power supply signal, to the ultrasound t...
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WO/2021/259915A1 |
The audio processing system comprises: - a digital input for a digital audio signal to be processed, encoded over a reduced number of bits fewer than 6, - a processing unit receiving, as input, the digital audio signal to be processed, a...
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WO/2021/247202A1 |
An integrator circuit includes: an operational amplifier; a first capacitor coupled to an input of the operational amplifier; a second capacitor coupled in parallel to the first capacitor so that a first terminal of the first capacitor i...
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WO/2021/222201A1 |
An analog signal generating source comprising two or more digital-to-analog converters (DAC) combined to generate one or more frequency components. The analog signal source comprises a first path for generating substantially low frequenc...
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WO/2021/210043A1 |
A data transmission system in which a sending station (300) that performs delta-sigma modulation sends data to a receiving station, wherein a control station (100) that controls the operation of the sending station (300) comprises: a fre...
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WO/2021/211369A1 |
A method for automatically correlating radio wave pulses includes deterring a first normalized phase shift that corresponds to a first radio wave pulse. The method further includes determining a second normalized phase shift that corresp...
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WO/2021/157290A1 |
An A/D converter comprising: a main A/D converter (110) that converts an analog input signal into a digital signal by causing an A/D converter having 2-bit or better resolution to perform ΔΣ operation; an amplification circuit (120) th...
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WO/2021/158361A1 |
A system to perform latency compensation techniques to facilitate synchronous sharing of video content during a communication session. The system enables video content that is being shared during the communication session to be played sy...
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WO/2021/148107A1 |
Analog-to-digital converters are disclosed that use digitally controlled analog networks. The digital control keeps the internal continuous-time analog states within their proper physical limits. Using many separate controls leads to rob...
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WO/2021/148300A1 |
Analog-to-digital converter devices are disclosed that use digitally controlled analog networks. The digital control keeps the internal continuous-time analog states within their proper physical limits. Using many separate controls leads...
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WO/2021/145930A1 |
A delta-sigma modulator (DSM) with non-recursive computation of delta-sigma residues comprising: an input port for receiving a digital input signal; a residue calculation circuit coupled to the input port for calculating delta-sigma resi...
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WO/2021/144941A1 |
When a high-order bit portion and a low-order bit portion of a digital input Din are respectively defined as DinH and DinL (Din = DinH + DinL), this digital/analog synthesis integrator has a low-order bit digital integrator and a low-ord...
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WO/2021/136645A1 |
A DAC (4), for use in an iADC (1), is configured for converting a multi-bit word (x[n]) to an analog feedback signal (y[n]). The DAC (4) comprises a MMS logic block (8). It further comprises a plurality of output elements (9) configured ...
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WO/2021/135296A1 |
A sensor detection circuit. The sensor detection circuit comprises an analog-to-digital converter and a digital signal processor which are located between an input end and output end of the sensor detection circuit, wherein the sensor de...
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WO/2021/130124A1 |
A sensor circuit comprising a sensor input includes a delta-sigma analogue to digital converter. The delta-sigma analogue to digital converter includes a switched capacitor, a common mode voltage source, a reference voltage source, and a...
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WO/2021/131747A1 |
An oversampling filter 110 oversamples a digital audio signal S1. A ΔΣ modulator 120 subjects an output S2 from the oversampling filter 110 to ΔΣ modulation. A D/A converter 130 converts an output S3 from the ΔΣ modulator 120 to an...
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WO/2021/116796A1 |
An amplifier circuit includes a resistor divider (RREF) comprising n resistive elements, two main nodes defined at each end thereof, two readout nodes (ch, cfe), resistor nodes (q) defined between adjacent resistive elements, and an inpu...
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WO/2021/117140A1 |
A filter circuit (1) according to the present invention is provided with: a division unit (2) that generates input blocks by dividing an input signal and adding, to the end of each division block, reproduced data generated by reproducing...
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WO/2021/103851A1 |
Disclosed is a signal modulation circuit. The signal modulation circuit comprises: a pre-amplification unit for amplifying an extracted input signal; a two-step fully differential OTA unit, which comprises a first-step fully differential...
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WO/2021/078960A1 |
The present invention relates to a sigma-delta analogue-to-digital converter. The sigma-delta analogue-to-digital converter has a transconductance stage having a first, second and third connection. A capacitor is parallel-connected to th...
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WO/2021/080721A1 |
In certain aspects, an analog-to-digital converter includes a first capacitive digitalto- analog converter (DAC), a second capacitive DAC, and a comparator including a first input, a second input, and an output. The analog-to-digital con...
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WO/2021/076254A1 |
A noise-shaping enhanced (NSE) gated ring oscillator (GRO)-based ADC includes a delay which delays and feedbacks an error signal to an input of the NSE GRO-based ADC. The feedback error signal provides an order of noise-shaping and the e...
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WO/2021/063874A1 |
A differential delta-sigma-modulator has an integrator (49) including a pair of single-ended amplifiers (46, 47). The differential delta-sigma-modulator comprises a sample clock (50) driving a first switchable capacitor configuration (31...
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WO/2021/066888A1 |
A delta-sigma modulator (DSM) with non-recursive computation of delta- sigma residues comprising: an input port for receiving a digital input signal; a residue calculation circuit coupled to the input port for calculating delta-sigma res...
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WO/2021/061885A1 |
Systems and methods are provided for increasing efficiency of excess loop delay compensation in delta-sigma analog-to-digital converters. In some examples, systems and methods are provided for reducing total capacitance in an embedded ex...
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WO/2021/058617A1 |
Systems and methods are provided for architectures for an analog feedback class D modulator that increase the power efficiency of the class D modulator. In particular, systems and methods are provided for an analog feedback class D modul...
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WO/2021/053332A1 |
An apparatus (7) for down-converting a sampled signal comprises a processing system (206) configured to apply a mixing-and-combining operation repeatedly to successive sub-sequences of N input samples, X, representative of a signal and h...
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WO/2021/032837A1 |
A current to digital converter circuit has an integrator amplifier (IAmp) with an input (12) adapted to receive a current signal (Ip) and an output (13) adapted to provide a voltage signal (Vout) as a function of an integration of the cu...
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WO/2020/242906A1 |
An analog to digital converter (ADC) includes voltage and reference input terminals, a buffer circuit, and control logic. The buffer circuit includes input and output terminals and a variable resistor including resistive branches connect...
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WO/2020/242908A1 |
An analog to digital converter (ADC) circuit includes voltage and reference input terminals, a sample circuit, and control logic. The sample circuit includes input and output terminals, and capacitors connected in parallel and arranged b...
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WO/2020/241102A1 |
This analog-digital conversion device is provided with: a variable gain amplifier which amplifies an inputted analog signal; a digital-analog converter which converts the analog signal that has passed through the variable gain amplifier ...
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WO/2020/223467A1 |
Video coding and decoding methods are described. In example method includes performing a conversion between a current video block of a video and a bitstream representation of the current video block by determining a first intra coding mo...
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WO/2020/195535A1 |
The purpose of the present disclosure is to provide a digital filter, an AD converter, a sensor processing circuit, and a sensor system which can achieve both high precision and low latency of output data. A digital filter (3) is used in...
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WO/2020/198111A1 |
A circuit (100) includes a programmable gain amplifier (PGA, 102) having a PGA output. The circuit (100) further includes a delta-sigma modulator (104) having an input coupled to the PGA output. The circuit (100) also includes a digital ...
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WO/2020/195534A1 |
The objective of the present invention is to provide an AD converter, a sensor processing circuit, and a sensor system with which it is possible to achieve both an increase in resolution and a reduction in latency simultaneously. An AD c...
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WO/2020/195754A1 |
Provided are an analog-to-digital (AD) converter, a sensor processing circuit, and a sensor system which can improve responsiveness of feedback control. An AD converter (1) is provided with an input unit (3), an AD conversion unit (2), a...
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WO/2020/181485A1 |
Provided is an analog-to-digital converter (10). The analog-to-digital converter has an analog-to-digital conversion operating mode and a measurement operating mode. The analog-to-digital converter comprises an input end (100), a digital...
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WO/2020/182340A1 |
A drive having an electric motor able to be fed by an inverter, wherein the electric motor is connected to the AC-voltage-side terminal of the inverter by way of feed lines, wherein current sensors for recording the current in one of the...
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WO/2020/180541A1 |
Methods and devices to mitigate time varying impairments in sensors are described. The application of such methods and devices to pressure sensors facing time varying parasitic capacitances due to water droplets is detailed. Benefits of ...
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