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JP2002135773A |
To provide an image processor capable of suppressing enlargement of circuit scale even if the setting of retrieval range is enlarged and also enables correlational calculation processing between image in real-time.In the image processor ...
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JP3280186B2 |
PURPOSE: To attain the fast and highly reliable serial communication by using a fast gate array that contains a parallel/serial conversion function and a communication function. CONSTITUTION: A gate array GA that contains a reception blo...
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JP2002123301A |
To securely stop an output signal without any delay time it some abnormality has occurred.An IO module 30 is provided with a watchdog timer circuit 38. The watchdog timer circuit 38 inputs one of parallel signals from a serial/ paralle c...
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JP2002111510A |
To provide a device for detecting the number of parallel events that have occurred, where the device is formed of only hardware and has a small- scale circuit.The occurrence signals of m events, which occur in parallel, are inputted into...
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JP2002108296A |
To provide a liquid crystal display device which has a liquid crystal panel with a built-in D/A converting section where increase in a circuit area is suppressed without increasing the capability of TFT characteristics.One main surface o...
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JP3272533B2 |
PURPOSE: To provide a multiplexer circuit and a demultiplexer circuit requiring only a few number of hardware sets. CONSTITUTION: A counter circuit 2 provides an output of select signals SEL 0-SEL3 whose period is 4Tc and going sequentia...
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JP2002099255A |
To reduce the sizes of a data converting method during a serial/ parallel conversion that especially requires high speed operations, a serial/ parallel converting IC, an image forming circuit and a display device in a data inputting circ...
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JP2002094368A |
To solve the problem of a conventional semiconductor integrated circuit device in which its area resulting in increasing the manufacturing cost is increased, because the conventional semiconductor integrated circuit device requires a plu...
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JP3269359B2 |
To make the hardware scale small, to reduce the cost, and to decrease the transmission time of data transmission by utilizing deviation in incidence probability of each bit, that is, each plane of an object picture element so as to enhan...
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JP3268428B2 |
To provide a signal processing apparatus provided with DMUX (demultiplexer) apparatuses and MUX (multipexer) apparatuses which can carry out feed-back control at a super high speed and extremely high time precision for orbital control of...
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JP2002084193A |
To provide a receiver for a wireless telecommunication system where, with no increase in distortion of a signal, a received signal is processed across a relatively wideband for simultaneous process with multiple received signals.A receiv...
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JP3255341B2 |
To improve transmission efficiency by allowing an integration section to integrate received pulses with respect to a high level period in a demodulation state of a PLL circuit, converting the pulse width into a voltage and latching the v...
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JP2002041280A |
To provide a serial parallel conversion device that can avoid concentration of an electric current, suppress the size required for wiring of output terminals and furthermore, the wiring resistance small.The serial parallel conversion dev...
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JP3249456B2 |
To eliminate the need of using a differential amplifier for substituting an input differential signal for two logic levels by permitting specified sample- and-hold units to simultaneously amplify series signal samples. A clock circuit 2 ...
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JP2002009744A |
To provide a multiplex transmission system that realizes multiplex transmission capable of transmitting data at a high speed without the need for increasing a transmission clock frequency.The multiplex transmission system where data are ...
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JP3244596B2 |
PURPOSE: To provide a parallel conversion circuit for serial digital data in which the load of signal processing by a CPU at a post-stage is relieved and which copes with analog 2-channel input signals related to each other. CONSTITUTION...
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JP2001350675A |
To provide a serial/parallel interface capable of determining at what point of time an error occurred on output data.The data set on an internal register are temporarily retained on a latch circuit after being read out, and the data reta...
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JP2001352318A |
To provide a data communication equipment with a novel configuration that transfers serial data while taking frame synchronization.The transmission circuit in the data communication equipment converts parallel data TXD 0-7 by one frame i...
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JP2001339315A |
To provide an image signal transmission system that can automatically adjust the amplitude of the signal outputted from an image transmitter corresponding to the level of a received signal changed in response to the length of a cable.An ...
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JP3235534B2 |
To provide a parallel - parallel conversion circuit which is suitable to a fast serial communication circuit. The parallel - parallel conversion circuits 103 and 203 are placed between a tree type MUX (multiplex)/DEMUX (demultiplex) circ...
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JP3231580B2 |
PURPOSE: To enable the regeneration and recovery of data when a power supply is turned on afterwards by a method, wherein a thin-film amorphous floating gate transistor of a parallel-series conversion cell is actuated, so that a data bit...
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JP3232835B2 |
PURPOSE: To attain the integration of a circuit and the reduction of a scale and to reduce a cost by constituting a line memory part of a shift register. CONSTITUTION: R, G, and B data transferred from an A/D conversion circuit at the fr...
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JP2001320280A |
To provide a parallel/serial(P/S) converting circuit capable of surely converting data by having a margin in timing between data clocks while using 1/10 or 1/5 conventional clocks.This circuit is composed of a P-Edge FF 3, N-Edge FF 5, f...
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JP3227894B2 |
PURPOSE: To attain synchronization with simple configuration and to insert a frame bit with synchronization by deciding uniquely a phase between clock signals and a phase between the clock signal and data when parallel data are converted...
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JP2001308719A |
To provide a signal processor which performs parallel/serial conversion, can reduce the number of gates and power consumption and can perform changeover between MSB first and LSB first with a simple configuration.Parallel input signals D...
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JP2001308829A |
To provide a bit protective circuit which prevents the increase of a circuit scale accompanying the number of bits and also has high versatility.Serial data 81 having a frame configuration are converted into parallel data in a shift regi...
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JP2001274763A |
To provide a data processing unit that can easily realize transparent processing of high-speed serial data in compliance with the STM or the like. The data processing unit 1 converts serial data of STM-16 format into parallel data consis...
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JP3214229B2 |
PURPOSE: To prevent overwrite with simple circuit configuration by connecting a 1st serial parallel S/P conversion circuit and a 3rd S/P conversion circuit or a 2nd S/P conversion circuit and the 3rd conversion circuit differentially, re...
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JP2001267932A |
To provide a serial/parallel data converter that uses a serial data input terminal in common for terminals that receive (1) information for applying output control to parallel data whose conversion is finished and (2) information that is...
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JP2001257727A |
To reduce serial-parallel data decision time.A shift register 18 receives a dynamic clock S21 of serial data and serial data S22. A data output control circuit 19 receives the serial data S22. A 1st bit of the serial data is outputted to...
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JP2001246792A |
To perform H-V conversion at a high speed in a serial scanning recorder.The serial scanning recorder for recording converted data while moving a recording head having a plurality of recording elements arranged in one longitudinal row in ...
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JP3203289B2 |
PURPOSE: To provide the time series synchronous circuit of the parallel processing decoder capable of guiding decoded signals into a state of time series synchronization at the time of time series step out. CONSTITUTION: The channel supe...
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JP2001223596A |
To provide a signal changeover device that can switch communication channels with a simple configuration.The signal changeover device is provided with a decoder 1 that gives a transmission data signal TXD and a communication control sign...
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JP2001223592A |
To provide a system transmitting word stream data including word synchronous data formed by transmission data, subjected to 8B/10B conversion and S/P conversion that uses transmission channels to transmit digital video signal data.First ...
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JP2001211078A |
To multiplex and transmit plural digital video signals of a word string data including a word synchronous data, through 8 bit/10 bit conversion and P/S(parallel/serial) conversion.In this method and device for data transmission, plural d...
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JP3192845B2 |
PURPOSE: To obtain an input register circuit in which a problem of its large momentary current is solved, the transfer of large amount of data in one cycle is not required and the momentary current is small CONSTITUTION: Sixteen cycles a...
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JP2001203586A |
To provide a data converter that converts gradation data in each color, which are generated simultaneously, into parallel data to be sent to a printer with a comparatively easy configuration without deteriorating the processing efficienc...
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JP3191275B2 |
PURPOSE: To transmit a signal without extending a photo-coupler (an insulating element) even when the amount of information transferred between the secondary side and the primary side is increased by transmitting the signal by using a pa...
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JP3191720B2 |
To reduce power consumption by decreasing the number of transistors to be driven by a control signal by performing the wired connection of plural latch circuits, which are respectively turned into dynamic hold state with different phases...
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JP3188563B2 |
PURPOSE: To solve the problem of integrating a plurality of source signals without using any master by setting the readout counters of all source modules to prescribed initial addresses when a reset signal disappears. CONSTITUTION: The d...
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JP2001168729A |
To provide a data transmission system capable of performing multi- point sampling and reducing generation probability of transmission errors without frequency-dividing clocks generated by a transmitter side to multiple and transmitting t...
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JP2001166986A |
To provide a data allocating device for storing data in a memory in the prescribed order of data.This data allocating device for allocating and storing data to be used for analysis in a memory is provided with a serial/parallel converter...
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JP3167435B2 |
PURPOSE: To provide a driver circuit which can constitute a liquid crystal driving circuit, etc., by the IC of the same kind even to the panel of any number of dots and also easily control data supply. CONSTITUTION: The driver circuit is...
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JP2001136077A |
To provide a circuit method that realizes high-speed encoding and decoding processing by means of large scale circuit integration with respect to proposals of a higher dimensional torus knot code that can correct errors at a deteriorated...
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JP2001136156A |
To provide a data transmission speed conversion circuit that can normally output data whose transmission speed is converted without causing a slip error. In the case of converting input data with 64 KHz into data with 2.048 MHz, a synchr...
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JP2001136076A |
To provide a serial-to-parallel converter that can realize a small circuit scale with low power consumption. A storage circuit 12 that stores data representing a part of an output of a shift register 11 consisting of flip-flop FFA1-FFAM ...
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JP3166692B2 |
To provide a coding circuit that is capable of initializing ports in parallel with initializing of a network, that is, performingly redetection of a border of block codes and reestablishing synchronization for a scrambler/ descrambler in...
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JP2001101155A |
To reduce the number of pins to be prepared in an ASIC. An A/D converter 12 generates parallel digital data by encoding an analog signal inputted to an input terminal 11b into n bits. An operation testing serial digital signal inputted t...
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JP2001094438A |
To provide a serial interface circuit that relieves a load on a software program and switches transmission and reception in an accurate timing. A transmission buffer circuit outputs a transmission end signal to a parallel/serial conversi...
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JP2001094570A |
To provide an ATM cell format converting circuit which simplifies the constitution of an ATM cell format converting circuit consisting of 53 bytes. A series-parallel converting circuit 10 converts an input data signal from an input termi...
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