| Document |
Document Title |
|
WO/2013/087203A1 |
The present invention relates to a signal generator circuit (1) supplied with a supply voltage and comprising toggling means (2) that comprises a first input to which a DC input signal (E1) having a defined amplitude is connected, a seco...
|
|
WO/2013/054730A1 |
A pulse generation circuit (12) is provided with: a PWM waveform output unit (20) that outputs a PWM waveform of a duty cycle, one linear PWM pulse of which is determined by a first bit count; an input connector (22) that is input with a...
|
|
WO/2013/047550A1 |
The present invention has a slope generation circuit and a one-bit determination circuit. A first one-bit digital signal is inputted to the slope generation circuit, which generates a slope for the first one-bit digital signal while the ...
|
|
WO/2013/048820A2 |
Groups of phase shifted PWM signals are generated that maintain their duty-cycle and phase relationships as a function of the period of the PWM signal frequency. The multiphase PWM signals are generated in a ratio-metric fashion so as to...
|
|
WO/2013/048817A2 |
A "quasi-master-time-base" circuit is used to periodically resynchronize the individual PWM generators to a know reference signal. This quasi-master-time-base will be at the lowest frequency relative to all of the PWM output frequencies,...
|
|
WO/2013/048727A2 |
Multi-phase, frequency coherent pulse width modulation (PWM) signals are generated that maintain PWM data-set coherency regardless of user or system events, PWM data-set coherency is accomplished by adding data buffers to hold and transf...
|
|
WO/2013/048819A2 |
Extending pulse width modulation phase offset when generating phase shifted groups of pulse width modulation (PWM) signals is accomplished with a separate phase counter that is independent of the time-base counters used in traditional PW...
|
|
WO/2013/048816A2 |
A plurality of pulse width modulation (PWM) generators are provided, each having a separate phase offset counter to create a phase shift instead of using either a time base counter preload value or an adder to create the phase shift offs...
|
|
WO/2013/017963A1 |
A method, system, and computer program product for improving the performance of a digital circuit are provided in the illustrative embodiments. A real frequency of operation of the digital circuit is adjusted using a control loop in the ...
|
|
WO/2013/006304A1 |
Circuits and methods used therein provide an adjustable average current through a load in accordance with a pulse width modulated (PWM) signal. A condition detection circuit is configured to identify a condition of the electronic circuit...
|
|
WO/2013/002259A1 |
A pulse modulator as laid out in the present invention is provided with: reference signal generation means for generating a reference signal for which the signal level changes in a sawtooth form at regular time frames; comparison means w...
|
|
WO/2013/000667A1 |
The invention relates to power electronics and to a method for actuating an inverter for outputting an AC voltage to an ultrasound device, wherein, depending on the current and/or the voltage, an actual variable is determined, wherein th...
|
|
WO/2012/170857A1 |
A high voltage waveform is generated that is similar to a low voltage input waveform. The high voltage waveform is a series of pulses that are applied directly to the device. An error signal controls the frequency, magnitude, and duratio...
|
|
WO/2012/163672A1 |
Electronic device, comprising: - a delay line (5) configured to generate a spread spectrum clock signal from a clock signal, a timing jitter and a period jitter of the spread spectrum clock signal being controlled at each period of the s...
|
|
WO/2012/167158A1 |
Object recognition apparatus and methods useful for extracting information from sensory input. In one embodiment, the input signal is representative of an element of an image, and the extracted information is encoded in a pulsed output s...
|
|
WO/2012/139754A1 |
The invention relates to an arrangement of electronic components to be used with a switching regulator, in particular to be used in a receiver or display of an automobile dashboard, wherein the switching regulator comprises a first oscil...
|
|
WO/2012/130990A1 |
A sensor arrangement for measuring an electric voltage (Uterm), wherein the potential point (1), at which the electric voltage relative to a defined electric potential, in particular relative to earth, is intended to be measured, is conn...
|
|
WO/2012/069512A2 |
A method is described for driving a full-bridge circuit (34,64) comprising a circuit (31) generating a first output modulation signal (m1) and a second output modulation signal (m2) for controlling the full-bridge. The method comprises t...
|
|
WO/2012/068035A1 |
Methods and apparatus for translating duty cycle information in duty-cycle- modulated signals to higher frequencies or higher data rates. An exemplary duty cycle translator includes a duty cycle evaluator, a high-speed digital counter, a...
|
|
WO/2012/055501A1 |
The present disclosure generally relates to the field of digital Class-D amplifiers and more specifically to a technique for reducing output waveforms distortion of a digital class-D amplifier implementing a ternary modulation scheme. An...
|
|
WO/2012/047507A1 |
Systems and methods for multimedia encoding and decoding are disclosed. The systems and methods include multimedia format detection systems, decoder functionality generation systems, decoder instantiation systems, and multimedia processi...
|
|
WO/2012/035474A1 |
A controller for an SMPS is disclosed. The controller applies a frequency jitter to the SMPS to reduce Electromagnetic Interference (EMI) and/or audible noise. A second input variable is multiplied by a correlated jitter signal, in order...
|
|
WO/2012/034247A1 |
The invention relates to an irradiation system for stimulating the health of cultivated vegetables and inhibiting the attack of phytopathogenic micro-organisms, comprising a control module having a microprocessor and peripherals; a power...
|
|
WO/2012/005482A2 |
A device for generating a 4-channel pulse width modulation signal includes a programmable logic unit, a binary counter unit, a 4-channel binary comparison unit, and an output buffer unit. The programmable logic unit is programmed to latc...
|
|
WO/2011/151140A1 |
According to the invention, the inductance is subjected to an alternating signal that alternates at least between a first discrete value and a second discrete value in order to generate at an output of the inductance a current which has ...
|
|
WO/2011/141657A1 |
The invention relates to a method of controlling a power converter comprising several breaker switches (T1 to T34) driven by a pulse width modulation of intersective type which consists in comparing an asymmetric triangular carrier (P1) ...
|
|
WO/2011/137653A1 |
The present invention discloses a device and a method for processing clock modulation modes, and the device includes: a clock modulation unit for performing clock modulation on signals; a modulation mode switching unit for controlling th...
|
|
WO/2011/129209A1 |
An object is to reduce degradation of circuit operation and to reduce the area of the entire circuit. A power source circuit is provided with a first terminal to which first voltage is input; a second terminal to which second voltage is ...
|
|
WO/2011/128219A2 |
The invention relates, inter alia, to a control device (10) for controlling an electric device (60) with a frequency converter (40) for generating a pulse-width modulated output voltage (Ua) for the electric device. The aim of the invent...
|
|
WO/2011/120815A1 |
What is proposed are: a method and a circuit arrangement (10) for generating a multiphase PWM signal (12). In this case, a number of PWM generators (20, 22, 24, 26) are provided which each have a counter (30, 54, 74, 94), two comparators...
|
|
WO/2011/120809A1 |
A method and a circuit arrangement (10) for generating a PWM signal are presented. In this case, the PWM signal is formed by an output signal from a state memory (24), wherein the state memory (24) is set in the case of a first event and...
|
|
WO/2011/120824A1 |
A method and a circuit arrangement (10) for producing a PWM signal are presented. The method uses the PWM generator, which can be operated with different basic clock signals, wherein the changeover between the basic clock signals is sync...
|
|
WO/2011/104247A1 |
The invention relates to a method for transforming an arbitrary HF signal in band pass pulse length modulation into a square pulse sequence. A completely linear, undistorted transmission of the envelope amplitude can thus be implemented....
|
|
WO/2011/106052A1 |
A decision- feedback equalizer (DFE) samples an analog input signal against M references during the same symbol time to produce M speculative samples. Select logic in the DFE then decodes N bits resolved previously for previous symbol ti...
|
|
WO/2011/102838A1 |
One embodiment provides a system (10) for generating a reference waveform. The system can include a first pulse-width modulation (PWM) channel (14) configured to provide a first PWM waveform having a first duty cycle and a first frequenc...
|
|
WO/2011/103353A1 |
A multichannel digital pulse width modulator/digital pulse frequency modulator uses a single ring oscillator that is shared by multiple channels. The ring oscillator has taps that can be used for least significant bit (LSB) precision of ...
|
|
WO/2011/103350A1 |
A practical method and system for oversampled digitally controlled DC-DC converters is presented. To minimize the switching losses while maintaining all advantages of the oversampling, "glue logic" and application specific oversampling d...
|
|
WO/2011/091741A1 |
A method and a device for extending controller pulse width modulation (PWM) resolution in the PWM control field are disclosed. The method includes: reading the actual value of a current analog quantity; acquiring the value of a preset an...
|
|
WO/2011/091261A2 |
An electronic device controlling a frequency modulation index has a frequency modulation index control loop (14) having an input (22) adapted to be connected to a frequency output (18) of a frequency controllable oscillator (16). The osc...
|
|
WO/2011/063536A1 |
The invention relates to a charge amplifier circuit for converting positive and negative charge signals Q that are output by a piezoelectric measuring element into a digital signal D that is proportional to the present measured value at ...
|
|
WO/2011/042919A1 |
A device and a method for implementing pulse width modulation for switching amplifiers (120) is described herein. In one embodiment, the device includes a sampling signal generator (202) to generate a sampling signal (208) and a modulati...
|
|
WO/2011/017802A1 |
A high voltage wave generator circuit is provided for generating high voltage square-waves and SPWM-waves. The circuit comprises a plurality of stages, each stage including (a) an input connected to a DC source, (b) a first switch, (c) a...
|
|
WO/2011/019319A1 |
An air ionizer electrode drive circuit and method in which an AC high voltage of predetermined constant amplitude is output by a high voltage generator (16) for application to the ionizer electrodes. The level of ions produced is then co...
|
|
WO/2011/017245A2 |
A pulse width modulation (PWM) frequency converter (100) converts an input PWM signal to an output PWM signal having a different frequency while maintaining a substantially equal duty ratio. The PWM frequency converter (100) samples the ...
|
|
WO/2010/145836A1 |
An integrator (100) comprises an amplification and phase shifting element (170) with a feedback path (130) forming a loop and comprising a capacitive element (140). An input signal is summed into the loop, and the loop is arranged to osc...
|
|
WO/2010/147292A1 |
An audio amp with a spurious wave noise reduction circuit according to the present invention comprises: an input unit receiving an audio signal for each channel; a modulation unit converting the audio signal into a pulse width modulation...
|
|
WO/2010/136225A1 |
The present application is directed generally to switch mode power supplies operating in a master-slave configuration and provides a method of synchronizing the PWM outputs from the master and slave devices to avoid problems such, for ex...
|
|
WO/2010/132460A2 |
A DC-coupled two-stage gate driver circuit for driving a junction field effect transistor (JFET) is provided. The JFET can be a wide bandgap junction field effect transistor (JFET) such as a SiC JFET. The driver includes a first turn-on ...
|
|
WO/2010/129824A1 |
All-digital techniques for generating periodic digital signals having selectable duty cycles. In one aspect, a computation block (210) is provided for computing the product of a selected duty cycle (C) and a discrete ratio (L) between a ...
|
|
WO/2010/120252A1 |
An amplitude of a carrier signal at an output of an impedance matching block is measured as a first amplitude value. A value of the signal amplitude at the output of the impedance matching block is calculated as a second amplitude value ...
|
