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WO/1995/032550A2 |
The invention relates to a method and an apparatus for forming a pulse amplitude modulated signal in association with digital modulation. In the method symbols to be transmitted are formed from bits of an incoming bit stream (D-IN). In o...
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WO/1994/011955A1 |
An adaptive data rate modulator/demodulator (modem) (102), particularly useful for transmitting data over fading communications channels, uses an adaptive data rate technique which supports multiple data rates in the same device. The mod...
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WO/1993/025000A1 |
A ramp generator (108) generates a ramp signal having a ramp portion; a latch signal generator (110) provides a latch signal coincident with the ramp portion; an indicator circuit (116, 134) indicates the desired width of a pulse to be g...
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WO/1993/025002A1 |
A dynamically selectable multimode pulse width modulation system (100) includes ramp generator means (108) for generating a ramp; pulse edge modulation means (106) responsive to the ramp generator means (108) for defining a leading edge ...
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WO/1993/025001A1 |
An anti-false triggering system for a pulse width modulation system includes a ramp generator (108) for generating a ramp signal having a ramp portion and a rest portion; a latch enable signal generator (110) for providing a latch enable...
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WO/1993/024999A1 |
A dual edge pulse width modulation system including a ramp generator (108) for generating a voltage ramp; an n bit digital to analog converter (102, 104) having a normal and an inverted output for establishing a leading edge and a traili...
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WO/1993/022151A1 |
A modular control means for an electrically driven vehicle in which modules (2, 12-18) are interconnected by a serial data bus (10). One line (26) of the serial data bus (10) may be biased high or low by modules of the system (2, 12-18) ...
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WO/1993/017491A1 |
An FM signal demodulation circuit capable of demodulating higher frequencies while maintaining linearity in the input and output signals. A first differential amplifier circuit (DA1) is supplied with an FM signal of one phase and a const...
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WO/1993/014563A1 |
An improved digital switching amplifier is disclosed. The amplifier utilizes a low-pass filter (LPF) at the input of the switching comparator (U1) to give an improved signal to noise ratio at the final output (Vf). In another aspect of t...
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WO/1993/010598A1 |
A device for modifying the pulse duty factor or the pulse number density of a signal sequence has a ramp generator (10) and a first storage (12) with a stored value that predetermines the pulse duty factor or the pulse number density. Ou...
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WO/1993/009599A2 |
A two-step analog-to-digital converter (300) and BiCMOS fabrication method to make the converter. The fabrication method provides pseudosubstrate isolation of digital CMOS devices from analog devices. The converter uses NPN current switc...
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WO/1992/009187A1 |
Variable width pulse generator comprising an assembly of logic stages which are connected in cascade. Each stage is arranged in order to receive one signal amongst a set of clock signals with different phase and corresponding to one of t...
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WO/1991/020074A1 |
A drive circuit for a liquid crystal display converts a display information signal (203) to an n bit gray scale code to control the brightness at a prescribed pixel. A counter (220) receives the m most significant bits of the n bit gray ...
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WO/1991/007011A1 |
The coding scheme involves transmitting a series of pulses, the separations between successive pulses representing the same data. Even though the separations between successive pulses all represent the same data, the separations are all ...
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WO/1990/011646A1 |
A process and device for voltage-frequency conversion are useful for obtaining, by simple means, a rapid, high-precision voltage-frequency convertor with a large frequency sweep. To this end, the dicontinuous output signal of an integrat...
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WO/1989/000739A1 |
A multiphase multiplier circuit employs analog switches, each of which is duty controlled for multiplying input voltage signal with a multiplier determined depending on the duty cycle of ON/OFF period. The multiphase multiplier circuit f...
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WO/1988/002201A1 |
A system for companding digital audio signal samples processes the digital audio signal samples to correct errors induced by the compression and expansion processes. These errors are calculated prior to compressing the samples. The error...
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WO/1988/002199A1 |
A system and method for modulating a carrier signal wherein occurence of the peaks in the modulated carrier signal conveys clocking information and each transition of a modulated carrier signal includes two midrange characteristics, the ...
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WO/1987/003434A1 |
Serial information bits are represented by a signal which alternates between two levels and remains at each level for a time representative of the information bit being represented. The serial bits are produced by sampling of a set of pa...
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WO/1986/007509A1 |
An apparatus for controllably producing a duty cycle modulated DC signal in response to receiving an analog voltage signal is useful, for example, in sensing mechanical motion and providing a responsive digital signal for use in a contro...
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WO/1986/007219A1 |
A phase modulator comprises an integrator (1) arranged to provide an output voltage (V) which can be changed from an initial level (V1), means (3) operative to effect change, at a time dependent upon receipt by the phase modulator of a c...
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WO/1985/004293A1 |
A control circuit having a drive circuit that operates in response to pulse-width modulated control signals to control a unit to be controlled. A first d-c voltage level is applied by a bias circuit (15) to an analog control signal. A tr...
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WO/1985/001847A1 |
The circuit arrangement of the current-impulse converter with variable time constant includes a digital gate, a feedback tag, a control capacitor and a charging capacitor, electronic switches connected serially to control capacitors. The...
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WO/1985/000257A1 |
Method for reading the signal to be detected according to the signal value and independently from the frequency range, as well as circuitry for implementing such method. The method according to the present invention is characterized in t...
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WO/1984/001244A1 |
Apparatus for converting an analog-format electrical signal or quantity (such as the magnitude of an electrical circuit element) into a corresponding pulse-format signal, preferably in the form of a train of periodic pulses the lenghts o...
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WO/1983/004148A1 |
A circuit for changing the frequency of a pulse train (10) in response to a change in the average value of an applied digital signal (18) applies the signal to be changed to a pulse subtractor (12). Application of a predetermined number ...
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WO/1982/002462A1 |
CVSD modulation is detected by applying a digital signal containing CVSD information to a digital filter (12) that is in the CVSD loop. The digital filter includes voltage-operated switches (40) that switch one of two voltages to a resis...
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WO/1981/001084A1 |
A circuit arrangement for an asynchronous motor drive of controlled stepping, i.e. for control of the number of revolutions of asynchronous squirrel-cage motors, in which the output of the supply unit is connected to a potentiometer, the...
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WO/1980/002457A1 |
A converter (photodiode 1) exposed to solar radiation (2) provides a d.c. current proportionnal to the radiation, charging a charge capacitor (3). This capacitor is connected at the input (11) of an analogue-digital switch (12) which pro...
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WO/1980/000206A1 |
Precision integrator with incremental outputs of the type comprising an operational amplifier mounted as an integrator, an analogue adder which does the summing up of currents I1, I2 at the input of the integrator, caracterized in that t...
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JP7471067B2 |
To make it possible to generate a high resolution PWM signal while using a realistic clock.A PWM control circuit according to an embodiment includes an oscillator, a counter, a first comparator circuit, a saw-tooth waveform generation ci...
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JP2024044801A |
[Problem] When controlling the operation of an external circuit outside the MCU device using the MCU's internal circuit, the CPU cannot execute a software reset, and an abnormal state occurs that cannot be detected by the voltage detecti...
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JP7443531B2 |
A picture element for a display device includes a first and a second supply connection, a light-emitting semiconductor device arranged between the first and the second supply terminal, and a comparison unit having a first and a second in...
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JP7440270B2 |
A sensor device includes at least one sensor, a digital signal processor and an amplifier. The at least one sensor is configured to measure a variable physical quantity and provide a raw sensor signal at an output of the at least one sen...
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JP7414723B2 |
According to one aspect of the invention, there is provided a signal processing method, wherein a frame is generated in which at least one position of occurrence of a transition in a pulse value is determined from an input bitstream. Acc...
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JP7411335B2 |
A pulse-width modulation control circuit includes a first transistor and a signal generator. The first transistor includes a first terminal coupled to a power source and a second terminal coupled to a first input of a controlled componen...
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JP7377608B2 |
A method for generating a pulse width modulation (PWM) signal, by a processor communicatively coupled to a system memory element, is provided. The method computes, by the processor, a coarse adjustment PWM output signal (312) and a modif...
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JP2023156238A |
To provide a pulse width control device and method.A logic circuit system that generates a pulse width modulated signal having a specific operating period includes a square wave generator that delays an input square wave signal to genera...
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JP7362169B2 |
Disclosed are a circuit and method for generating ultrahigh-precision digital pulse signals. The circuit comprises: a pulse edge control circuit used for delaying a signal on an input pin Input to some extent and accurately controlling p...
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JP2023539059A |
Embodiments of the present disclosure provide systems and methods for reducing EMI effects produced by analog blocks. By varying the oscillator clock signal frequency used in such analog blocks over time, the EMI energy can be spread ove...
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JP2023100015A |
To reduce radiation noise.A clock signal generating circuit comprises: a triangular wave generation circuit (111) configured to generate a triangular wave signal (S111); a pseudo-random number generation circuit (112) configured to gener...
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JP2023078358A |
To provide methods and devices for generating pulse-width modulated (PWM) waveforms for radio-frequency (RF) applications.An RF power generation and delivery system 4200 comprises: a pulse width modulation (PWM) generator 4236 comprising...
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JP7252323B2 |
Described are concepts, systems, circuits and techniques directed toward methods and apparatus for generating one or more pulse width modulated (PWM) waveforms with the ability to dynamically control pulse width and phase with respect to...
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JP7227247B2 |
An error amplifier for a pulse width modulation circuit is described. The amplifier includes an operational amplifier configured as an integrator and a feedback loop coupled between a signal output of the operational amplifier and an inv...
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JP7220401B2 |
To provide a pulse width modulation circuit of high resolution.A pulse width modulation circuit has a reference discrimination circuit 12 outputting a determination signal capable of taking three states ST1, ST2, ST3 based on the magnitu...
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JP7218212B2 |
A semiconductor device of an embodiment includes a main circuit configured to perform a predetermined operation to an input signal to output an output signal, an inverse operation circuit configured to receive the output signal of the ma...
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JP7189646B2 |
Systems and methods for wireless power transfer with fractional timing resolution are described. In some embodiments, an electrical power transmitter may include a transistor and a rising edge control circuit configured to control a gate...
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JP7151260B2 |
An A-D conversion circuit configured to convert an analog input signal into numerical data using a pulse delay circuit includes pulse position digitizing units, a clock generation circuit, and a processing unit. The clock generation circ...
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JP2022139325A |
To provide a signal output device that can improve the convenience of communication.A signal output device 10 outputs a communication signal to a propagation line 30. The signal output device 10 includes a modem 11 that generates one of ...
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JP2022139217A |
To provide a slope signal generation circuit, a PWM signal generation circuit, a display device, and a slope signal generation method capable of generating a highly accurate slope signal.A slope signal generation circuit in one embodimen...
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