Document |
Document Title |
WO/2024/024138A1 |
A short-circuit protection circuit according to the present invention is provided with: a voltage dividing circuit that divides a power supply voltage supplied from a power supply connected at one end; a semiconductor rectifying element,...
|
WO/2024/023121A1 |
The invention relates to a method for synchronizing a time-measuring assembly comprising at least a first time-measuring device (1) and a second time-measuring device (2), which are connected to each other for radio signal transmission, ...
|
WO/2024/022958A1 |
A Traveling Wave Parametric Amplifier (TWPA) transmission line with improved bandwidth includes one or more unit cell. Each unit cell includes a capacitor to a ground and a Josephson junction in series configured to provide inductance an...
|
WO/2024/020675A1 |
A system, device and method are provided for reducing machine learning models for target hardware. Illustratively, the method includes providing a model, a set of training data, and a training threshold. A search space for reducing the m...
|
WO/2024/022225A1 |
A radio frequency switching circuit which has high tolerance power, a chip and an electronic device thereof. The radio frequency switching circuit is composed of multiple stages of switching transistor units connected in series. In each ...
|
WO/2024/022590A1 |
A data processing apparatus (100) is disclosed for compressing a neural network (200). The apparatus comprises a processing circuitry (101) configured to operate the neural network, wherein the neural network comprises a plurality of pro...
|
WO/2024/021191A1 |
Provided in the present disclosure is an impedance calibration circuit, comprising: a calibration module, which is used for receiving a first calibration clock signal, performing impedance calibration on the basis of the first calibratio...
|
WO/2024/022736A1 |
The present invention relates to a wireless end node, that comprises a Direct Sequence Spread Spectrum (DSSS) demodulator, wherein the DSSS demodulator is based on a double correlation algorithm, a data communications module configured t...
|
WO/2024/023111A1 |
A signal processing circuit for a spiking neural network, comprising an interface for converting an analog input signal to a corresponding spike-time representation of the analog input signal. The interface comprises an analog-to-informa...
|
WO/2024/026161A1 |
A multi-stage driver circuit (116) has a transmission line (119) coupled to an output of the multi-stage driver circuit (116). The transmission line (119) has inductive elements and programmable capacitive elements (130) selected to shap...
|
WO/2024/026218A1 |
A pulse width modulator circuit (100) with circuitry (126) for providing first and second pulse width modulation signals (PWM_T_ SD; PWM_B_SD) with dead time periods between the first and second pulse width modulation signals, an input (...
|
WO/2024/023429A1 |
The invention relates to a device (100) for controlling and protecting a power transistor (102), comprising: - a nominal switching circuit (103) for the transistor; - a short-circuit detection circuit (105) which keeps the transistor in ...
|
WO/2024/022723A1 |
The invention relates to a method for preparing a single-domain thin layer (4) made of lithium-containing ferroelectric material. The method comprises providing a first single-domain layer (8) made of lithium-containing ferroelectric mat...
|
WO/2024/023711A1 |
The present invention offers novel ways of achieving high degree of mechanical stress isolation and high accuracy of temperature sensing in quartz crystal resonators.
|
WO/2024/023046A1 |
Systems and techniques that facilitate mitigating stray-coupling via multi-junction qubits are provided. In various embodiments, a device can comprise a first qubit having a plurality of Josephson junctions respectively between a plurali...
|
WO/2024/020681A1 |
Methods for transferring a signal across an isolation barrier include encoding the signal according to at least first and second parameters at a second side of the isolation barrier and using one or more isolating device to transfer the ...
|
WO/2024/021170A1 |
A level-shifting output buffer has cascode transistors with varying rather than fixed gate bias voltages. An adaptive regulator bypasses the I/O pad voltage to a regulator output when the I/O begins switching, but later clamps the regula...
|
WO/2024/020746A1 |
A method and apparatus for processing FASTQ data, and an electronic device and a storage medium, which relate to the technical field of data processing. The main technical solution comprises: performing filtering processing on an origina...
|
WO/2024/021831A1 |
Provided in the embodiments of the present application is a signal transmission circuit. The signal transmission circuit comprises a positive input end; a negative input end; and an amplification unit which is connected to the positive i...
|
WO/2024/024614A1 |
A quartz crystal vibration plate 2 comprises an outer frame part 23 and a vibrating part 22 formed to be thinner than the outer frame part 23. A perforation 2a is formed between the outer frame part 23 and the vibrating part 22. The oute...
|
WO/2024/020769A1 |
The present disclosure relates to the technical field of communications, and provides a bulk acoustic resonator and a preparation method therefor, and an electronic device. The bulk acoustic resonator of the present disclosure comprises ...
|
WO/2024/023983A1 |
This connecting device comprises a first connecting unit that toggles between whether or not a first terminal and a second terminal are to be connected, and a second connecting unit that toggles between whether or not the first terminal ...
|
WO/2024/022226A1 |
Disclosed are a radio-frequency switch circuit supporting a high-power mode, a chip, and an electronic device. The radio-frequency switch circuit is formed by connecting multiple stages of switch transistor units in series. In each stage...
|
WO/2024/024334A1 |
The present invention provides a buffer circuit that can achieve a wide dynamic range while maintaining a low output impedance, and with which reduced circuit area and low power consumption can be attained. The buffer circuit comprises a...
|
WO/2024/026006A1 |
The disclosure pertains to methods and apparatus for reporting channel state information (CSI) feedback in wireless telecommunication networks. In an example, a method implemented in a wireless transmit/receive unit (WTRU) may include re...
|
WO/2024/021008A1 |
Embodiments of the present application provide a data processing method, device and system, and a storage medium. The method may comprise: performing compression encoding processing on collected first initial data to obtain first data; r...
|
WO/2024/023577A1 |
Josephson junction based logic devices and methods for their use are described. An example Josephson junction based logic device includes a two-input OR/AND (OA2) gate. The OA2 gate includes a first input node inductively coupled to a fi...
|
WO/2024/023479A1 |
A driver (300, 400) for driving a transducer has nodes for connection to high-side and low-side voltage supplies, an output node (301) and nodes (N1-N4) for connecting first and second capacitors (C1, C2). A network of switches is config...
|
WO/2024/026054A1 |
In some examples, a circuit (104) includes a phase frequency detector (PFD) (206) having a first input, a second input, and an output. The circuit also includes a control circuit (208) having an input and an output, the control circuit i...
|
WO/2024/024397A1 |
This damper comprises: a substrate; a metal component; a first surface-mounted component disposed on one surface of the substrate; a second surface-mounted component disposed on the other surface of the substrate; and a one-surface-side ...
|
WO/2024/021538A1 |
The present application provides a high-low level conversion circuit. The circuit comprises a high voltage to low voltage module, a low voltage to high voltage module, a first target chip, and a second target chip; the low voltage to hig...
|
WO/2024/024741A1 |
In a crystal oscillator 101, hermetic sealing is performed by sandwiching a crystal vibration plate 2, on which first and second excitation electrodes 221, 222 are formed, between first and second sealing members 3, 4 disposed above and ...
|
WO/2024/023164A1 |
A comparator (10) comprises an input stage (IS), configured to receive a pair of input signals (S1, S2) to generate at least one differential current signal (S3). The comparator (10) further comprises an output stage (OS) configured to g...
|
WO/2024/023244A1 |
A control device (1) for a plasma production system (100) is used to actuate an impedance-matching circuit (50) comprising an input terminal (50a) and an output terminal (50b). The impedance-matching circuit (50) is connected between a H...
|
WO/2024/021912A1 |
The present application relates to the technical field of signal processing, and discloses a sample and hold circuit and a sample and hold method. The circuit comprises an input unit, track/hold switch units, and output units. The input ...
|
WO/2024/026092A1 |
A spatially unrolled time domain (TD) architecture that includes an input and weight register having i inputs and j weights, where i corresponds with a number of delay lines for i neurons, and j corresponds with a number of processing el...
|
WO/2024/021537A1 |
Provided in the present application are an offset voltage calibration circuit and method. The circuit comprises: a multi-stage amplifier; a gating switch, which comprises a plurality of switches each correspondingly connected to an outpu...
|
WO/2024/025976A1 |
Systems and methods are disclosed for improving common mode transient immunity in silicon digital isolators using capacitive barrier for galvanic isolation. The systems include transmitters and receivers that include differential amplifi...
|
WO/2024/024778A1 |
Provided is an elastic wave resonator comprising a piezoelectric layer and an IDT electrode. The piezoelectric layer is piezoelectric. The IDT electrode is positioned on a first surface of the piezoelectric layer, and comprises a plurali...
|
WO/2024/025975A1 |
One aspect disclosed features an apparatus comprising: an input buffer configured to receive an input voltage pulse as an input, and to output, responsive to a leading edge of the input voltage pulse, a logic high voltage pulse at a firs...
|
WO/2024/021212A1 |
A novel differential amplifier having a feedforward bias correction circuit, and equipment. A common-mode voltage output of the differential amplifier is dynamically adjusted by means of the bias correction circuit according to an input ...
|
WO/2024/021360A1 |
Provided in the embodiments of the present application is a counter, comprising: a counting module, which comprises a plurality of cascaded sub-counters and a delay unit connected between at least two adjacent sub-counters among the plur...
|
WO/2024/026184A1 |
Methods and apparatus for wireless communication using a transmitter capable of digital predistortion (DPD) and having a main signal path separated from a predistortion signal path, each path including a digital-to-analog converter (DAC)...
|
WO/2024/021933A1 |
The present invention relates to a bulk acoustic resonator and a manufacturing method therefor. The bulk acoustic resonator comprises a substrate, an acoustic mirror, a bottom electrode, a top electrode, and a piezoelectric layer arrange...
|
WO/2024/025458A1 |
A bulk acoustic wave, BAW, (100) device with resonance-tuned layer stack is disclosed. The BAW device includes two acoustic resonators (102(A)), 102(B)) with top electrodes (104(A)), 104(B)) in different regions (108(A)), 108(B)) on a to...
|
WO/2024/021844A1 |
The present invention relates to a bulk acoustic resonator and a manufacturing method therefor. The resonator comprises a substrate, a bottom electrode, an acoustic mirror, a top electrode, and a piezoelectric layer. The bottom electrode...
|
WO/2024/025498A1 |
The invention discloses a circuit that reduces the effect of settling time-related errors by accelerating the settling time and reduces the circuit noise to a negligible level, characterized by comprising amplifier (1) wherein reference ...
|
WO/2024/022019A1 |
A sampling control method of a multi-module data collector, comprising: when synchronous sampling is required between dynamic signal collection modules in a collector and a key-phase signal exists, the key phase signal collection channel...
|
WO/2024/025234A1 |
A foldable electronic device according to an embodiment of the present invention comprises: a hinge module; a first housing at least partially coupled to a first side of the hinge module; a first printed circuit board that is disposed in...
|
WO/2024/022981A1 |
A method of using Josephson Junctions to convert the envelope of radio-frequency signals into baseband control pulses includes injecting a biasing current into an envelope detector circuit. The biasing current is identified based on firs...
|