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Patent Searching and Data


Title:
TRANSISTOR, 3D MEMORY AND MANUFACTURING METHOD THEREFOR, ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/082395
Kind Code:
A1
Abstract:
A transistor, a 3D memory and a manufacturing method therefor, and an electronic device, relating to the technical field of semiconductors. The 3D memory comprises multiple layers of memory cells stacked in a direction perpendicular to a substrate (1) and a word line (110); each memory cell comprises a transistor, and the transistor comprises a source electrode (51) and a drain electrode (52), a gate (11) extending in the direction perpendicular to the substrate (1), and a semiconductor layer (9) surrounding the sidewall of the gate (11); the semiconductor layer (9) comprises a source contact area and a drain contact area arranged at an interval; and a channel between the source contact area and a drain contact area is a horizontal channel, and the word line (110) extends in the direction perpendicular to the substrate (1) and penetrates through the memory cells in different layers.

Inventors:
DAI JIN (CN)
YU YONG (CN)
LIANG JING (CN)
Application Number:
PCT/CN2022/137325
Publication Date:
April 25, 2024
Filing Date:
December 07, 2022
Export Citation:
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Assignee:
BEIJING SUPERSTRING ACADEMY OF MEMORY TECH (CN)
International Classes:
H10B12/00; H01L29/786
Foreign References:
CN115346988A2022-11-15
CN115346987A2022-11-15
CN112635463A2021-04-09
CN114864583A2022-08-05
CN115020480A2022-09-06
US20080310213A12008-12-18
CN202211270027A2022-10-18
Attorney, Agent or Firm:
AFD CHINA INTELLECTUAL PROPERTY LAW OFFICE (CN)
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