Title:
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/045259
Kind Code:
A1
Abstract:
A semiconductor structure and a manufacturing method therefor, the semiconductor structure comprising: a substrate (1) and a word line structure (3). The word line structure (3) comprises: a work function laminated structure (33) located in the substrate (1), the work function laminated structure (33) comprising multiple first work function layers (331) and second work function layers (332) which are alternately stacked in sequence, the work function of a first work function layer (331) being greater than the work function of a second work function layer (332); a word line conductive layer (34), located in the substrate (1) and located at an upper surface of the work function laminated structure (33); and a gate oxide layer (32), located between the work function laminated structure (33) and the substrate (1), and between the word line conductive layer (34) and the substrate (1).
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Inventors:
ZHAO CHUNLEI (CN)
XU YACHAO (CN)
ZHANG RUIQI (CN)
YANG XIAOYU (CN)
XU YACHAO (CN)
ZHANG RUIQI (CN)
YANG XIAOYU (CN)
Application Number:
PCT/CN2022/123745
Publication Date:
March 07, 2024
Filing Date:
October 08, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L29/78; H01L29/423
Foreign References:
| CN105702730A | 2016-06-22 | |||
| CN104299897A | 2015-01-21 | |||
| CN113936999A | 2022-01-14 | |||
| CN108777261A | 2018-11-09 | |||
| JP2012124215A | 2012-06-28 |
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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