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Patent Searching and Data


Title:
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2023/236284
Kind Code:
A1
Abstract:
Disclosed in embodiments of the present disclosure are a semiconductor structure and a manufacturing method therefor. The semiconductor structure comprises a substrate, a dielectric layer, a gate structure, and a covering layer. The substrate comprises discrete semiconductor columns, and the semiconductor columns are arranged at the top of the substrate and extend in the vertical direction. The dielectric layer covers the side walls of the semiconductor columns. The gate structure is provided in the middle area of the semiconductor column. The gate structure comprises a gate-all-around structure, and the gate-all-around structure surrounds the semiconductor columns. A first portion of the dielectric layer is located between the gate structure and the semiconductor column. The covering layer covers the top of the semiconductor column and the part of the side wall close to the top. The material of the covering layer comprises a boron-containing compound.

Inventors:
JANG SEMYEONG (CN)
MOON JOONSUK (CN)
XIAO DEYUAN (CN)
HONG MINKI (CN)
LEE KYONGTAEK (CN)
CHIN JO-LAN (CN)
Application Number:
PCT/CN2022/102663
Publication Date:
December 14, 2023
Filing Date:
June 30, 2022
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/108; H01L21/8242
Domestic Patent References:
WO2013033267A12013-03-07
Foreign References:
CN102867752A2013-01-09
CN101740500A2010-06-16
US20060043471A12006-03-02
US5244824A1993-09-14
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
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