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Patent Searching and Data


Title:
LOCAL VDD AND VSS POWER SUPPLY THROUGH DUMMY GATES WITH GATE TIE-DOWNS AND ASSOCIATED BENEFITS
Document Type and Number:
WIPO Patent Application WO/2024/082733
Kind Code:
A1
Abstract:
An integrated circuit structure includes a power supply rail formed in a backside of a semiconductor wafer. The integrated circuit structure also includes a frontside BEOL wire layer connected to the power supply rail through a gate, wherein the gate is of a type to be powered off by a power supply coupled through the gate from the power supply rail to the first frontside BEOL wire layer. A method of forming an integrated circuit structure includes forming a power supply rail in a backside of a semiconductor wafer, forming a gate in the semiconductor wafer, and forming a frontside BEOL wire layer connected to the power supply rail through the gate. Again, the gate is of a type to be powered off by a power supply coupled through the gate from the power supply rail to the first frontside BEOL wire layer.

Inventors:
XIE RUILONG (US)
LANZILLO NICHOLAS ANTHONY (US)
CLEVENGER LAWRENCE A (US)
SHOBHA HOSADURGA (US)
HUANG HUAI (US)
Application Number:
PCT/CN2023/108135
Publication Date:
April 25, 2024
Filing Date:
July 19, 2023
Export Citation:
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Assignee:
IBM (US)
IBM CHINA CO LTD (CN)
International Classes:
H01L23/528
Foreign References:
US20210358891A12021-11-18
US20210066489A12021-03-04
US10192819B12019-01-29
US20220238388A12022-07-28
US20190244955A12019-08-08
CN113948572A2022-01-18
Attorney, Agent or Firm:
CCPIT PATENT AND TRADEMARK LAW OFFICE (CN)
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