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Title:
SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
Document Type and Number:
WIPO Patent Application WO/2024/005172
Kind Code:
A1
Abstract:
The purpose of the present invention is to improve the production yield. A semiconductor device according to the present invention comprises a base member which has a first bonding surface and a semiconductor chip which has a rectangular second bonding surface; and the second bonding surface of the semiconductor chip and the first bonding surface of the base member are directly bonded to each other. The semiconductor chip is provided with: a multilayer wiring layer that comprises the second bonding surface; and a semiconductor layer that is arranged on a surface of the multilayer wiring layer, the surface being on the reverse side from the second bonding surface side. The multilayer wiring layer comprises a warping suppression layer which extends along at least one side of the second bonding surface and suppresses warping of the semiconductor chip.

Inventors:
HORIKIRI TATSUYA (JP)
FUJII YOSUKE (JP)
MIYAWAKI TAKUHIRO (JP)
SAITO SOTETSU (JP)
YAMAGUCHI MASANARI (JP)
MURAKAMI YUKAKO (JP)
OINOUE TAKASHI (JP)
OGAWA NAOKI (JP)
HIRATSUKA TATSUMASA (JP)
ONODERA TAKUMI (JP)
MIKI HOKUTO (JP)
HIRANO TAKAAKI (JP)
NEGORO YOICHI (JP)
OKUYAMA ATSUSHI (JP)
Application Number:
PCT/JP2023/024297
Publication Date:
January 04, 2024
Filing Date:
June 29, 2023
Export Citation:
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Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/146; H04N25/70
Domestic Patent References:
WO2020183965A12020-09-17
WO2019021705A12019-01-31
WO2020055889A12020-03-19
Foreign References:
JP2010165747A2010-07-29
JP2009212315A2009-09-17
JPH1140687A1999-02-12
JP2010205893A2010-09-16
JP2008270487A2008-11-06
Attorney, Agent or Firm:
TANAKA Hidetetsu et al. (JP)
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