Title:
MEMORY FAULT REPAIRING METHOD AND APPARATUS
Document Type and Number:
WIPO Patent Application WO/2024/093299
Kind Code:
A1
Abstract:
The present application provides a memory fault repairing method and apparatus. In the method, a processor sequentially reads multiple memory cells comprised by a first memory, and every time failure of a target memory cell to be read is predicted, the processor reads data from the target memory cell to be read, and writes the read data into a backup memory cell in a second memory. The processor adds a failure identifier to the target memory cell, and stores a correspondence between an address of the target memory cell and an address of the backup memory cell. By means of the described method, a processor can resolve failure of a memory cell without replacing a memory bank or a memory array, and can realize fault repair only using some memory cells in a second memory, thereby saving memory resources and reducing the cost of fault repair.
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Inventors:
YANG TIANWEN (CN)
YAN PENG (CN)
LI BUCHAN (CN)
QIU YOUCHENG (CN)
MIN WENBIN (CN)
YAN PENG (CN)
LI BUCHAN (CN)
QIU YOUCHENG (CN)
MIN WENBIN (CN)
Application Number:
PCT/CN2023/103509
Publication Date:
May 10, 2024
Filing Date:
June 28, 2023
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
G06F11/07
Attorney, Agent or Firm:
TDIP & PARTNERS (A- Building North Ring Center, No.18 Yumin Roa, Xicheng District Beijing 9, CN)
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