FIELD OF THE INVENTION

The present invention relates to a converter and method for generating a multi-phase voltage for powering an electrical machine, for example for powering a motor or generator.

BACKGROUND OF THE INVENTION

There is a general move away from internal combustion engines to more electric and fully electric vehicles. The automotive industry has built a reputation on reliability and technical innovation and the rapid move to more electric has led to demands on maximising many aspects of electric power supplies and drives. Power supplies, inverter I rectifier I converters, switching circuitry, controls and passive elements are critical components in electric drives and their reliability of paramount importance. Minimising cost of ownership whilst maximising reliability and efficiency across all parts of transient I model drive cycles is driving innovation.

Two level inverters produce an alternating current (AC) output waveform by using pulse width modulation (PWM) applied to semiconducting switches between two voltage levels. For every switching period the phase spends a time period connected to a +DC voltage and a time connected to a -DC voltage. The ratio of these times determines the voltage output in the AC waveform.

Whereas two level inverters have good efficiency when working under heavy loads i.e. , a substantial proportion of the available voltage range, they are inefficient when operating at light loads where switch losses dominate. Switching also causes disturbances (ripple) on the DC supply voltage which can adversely affect other equipment, and to counter this, a DC capacitance rated for full voltage range is often used to smooth, switch induced ripple disturbances, and provide a local reservoir of energy. Three level inverters are so called because they operate switches using PWM between three voltage levels. Upper and lower bounding voltages are as for two level operation, and the third supply point is mid-way / mid-voltage between these two bounds.

A mid-voltage level is supplied by a pair of capacitor voltage dividers, which because each capacitor sees only half the full range voltage of a two-level inverter, the capacitors can be smaller of lower specification and cost.

Though three level inverters can be used over the full the voltage range, there is benefit in operating at low loads to reduce mid-voltage switch and series capacitor specifications. Three level inverters are usually neutral point clamped (NPC) to protect lower specified components. However, three level inverters can be more complex and costly if used across the whole operating range of the electrical machine being powered by the converter.

We have therefore appreciated the need of a converter that has the benefits of both two- level and three-level techniques for use across the whole operating range of the electrical machine without the increase in cost and complexity of traditional three-level converters.

SUMMARY OF THE INVENTION

The present invention therefore provides a method of generating a multi-phase output voltage, and a converter for generating a multi-phase output voltage, for driving an electrical machine in accordance with the independent claims appended hereto.

Further advantageous embodiments are also provided in accordance with the dependent claims, also appended hereto.

We describe a converter for generating a multi-phase voltage for powering an electrical machine, comprising: inputs for receiving a positive DC input voltage and a negative DC input voltage; a plurality of AC outputs, one per phase, for outputting a multi-phase AC output voltage for driving an electrical machine; for each phase, a plurality of switches arranged between the DC input and the respective AC phase output in a t-type arrangement, the t-type arrangement comprising an upper switch coupled between a positive DC input and the respective AC phase output, a lower switch coupled between the respective AC phase output and negative DC input, and a mid-upper switch and a mid-lower switch coupled between the AC phase output and a second DC input voltage, the switches being arranged in respective upper and lower pairs of switches, the upper pair comprising the upper and mid-lower switches and the lower pair of switches comprising the lower and mid-upper switches, and the second DC input voltage being a voltage between the positive and negative DC input voltages; an input for receiving data representing a required operating point of the electrical machine; and a controller for controlling each of the switches using Pulse Width Modulation (PWM) over a plurality of PWM periods to generate the multi-phase AC output voltages for an electrical machine, wherein the controller is configured, for each PWM period, to: determine a switching mode for controlling one or more of the plurality of switches based on the required operating point of the electrical machine and based on load characteristic data for the required operating point of the electrical machine, the load characteristic data comprising a model defining one or more operating parameters of the electrical machine at a plurality of operating points; control one or more of the switches using PWM in a two-level configuration to generate the multi-phase AC phase output voltages when the switching mode is determined to be two-level; and control one or more of the switches using PWM in a three-level configuration to generate the three AC phase output voltages when the switching mode is determined to be three-level.

Advantageously, such an arrangement allows a converter to be used that is capable of switching between two-level and three-level switching modes depending on one or more operating parameters. As such, the performance of the converter and electrical machine can be optimised for each PWM period depending on one or more factors.

The operating parameters of the electrical machine at a plurality of operating points may comprise one or more of an EMI value, second DC input voltage value, switch thermal value, efficiency value, NVH (Noise Vibration and Harshness) value, electrical machine harmonics value, DC input voltage ripple value, and output voltage harmonics value. The controller may be configured to determine the switching mode in order to maintain the one or more operating parameters at, above or below a respective threshold value.

When the operating parameter is an EMI value, the model comprises data defining a range of operating points having a predicted increase in potential EMI levels, and wherein the controller is configured to determine a three-level switching mode if the desired operating point coincides with an operating point having a predicted increase in potential EMI levels.

When the operating parameter is a second DC input voltage value, the controller may be configured to determine a two-level switching mode if the second DC input voltage value is above a threshold value. The second DC input voltage value may comprise a magnitude value of ripple on the second DC input voltage, and wherein the controller may be configured to determine a two-level switching mode if the magnitude of the ripple on the second DC input voltage is above a threshold. Alternatively, the second DC input voltage value may comprise a magnitude of a voltage deviation from a nominal second DC input voltage value, and wherein the controller may be configured to determine a two-level switching mode if the magnitude of the voltage deviation away from the nominal second DC input voltage value is above a threshold value.

When the operating parameter is a switch thermal value, the controller may be configured to determine a two-level switching mode if the thermal value of the mid-lower switch or the mid-upper switch is above a threshold value.

When the operating parameter is efficiency, the model may comprise efficiency data representing a plurality of operating points at which three-level operation would provide increased efficiency, and wherein the controller may be configured to compare the required operating point of the electrical machine with the operating points of the efficiency data and determine a three-level switching mode if the required operating point and the operating point efficiency data coincide.

When the operating parameter is an NVH value, the controller may be configured to determine a three-level switching mode if the NVH value for the operating point is above a threshold value.

When the operating parameter is an electrical machine harmonics value, the controller may be configured to determine a three-level switching mode if the electrical machine harmonics value for the operating point is above a threshold value. When the operating parameter is a DC input ripple voltage value, the controller may be configured to determine a three-level switching mode if the DC input ripple voltage value for the operating point is above a threshold value.

When the operating parameter is an output voltage harmonics value, the controller may be configured to determine a three-level switching mode if the output voltage harmonics value for the operating point is above a threshold value.

The second DC input voltage may be generated from the positive and negative DC input voltages and a plurality of capacitors arranged between the positive DC input voltage and the negative DC input voltage. Alternatively, the second DC input voltage is received from a second DC source.

When the switch mode is a three-level switch mode, the controller may be configured to clamp the respective phase output voltage to the second DC voltage during a switch transition of one or both of the switches forming the upper pair of switches or during a switch transition of one or both of the switches forming the lower pair of switches. The controller may be configured to clamp the respective phase output voltage to the second DC voltage by holding the mid-lower switch on during a switch transition of one or both of the switches forming the lower pair of switches.

The controller may also be configured to clamp the respective phase output voltage to the second DC voltage by holding the mid-upper switch on during a switch transition of one or both of the switches forming the upper pair of switches.

When the controller switched the upper switch during the previous PWM period and when the controller switches the lower pair during the current PWM period, the controller may be configured only to turn on the mid-lower switch to clamp the respective phase output voltage to the second DC voltage after a deadtime period has expired.

When the controller switches the lower pair during the current PWM period and when the controller is due to switch the upper switch in the next PWM period, the controller may be configured to turn off the mid-lower switch a deadtime period before the end of the current PWM period. When current flows from the electrical machine into the converter and wherein the controller switches the lower pair of switches in the current PWM period and wherein the controller is due to switch the lower pair of switches in the next PWM period, the controller may be configured to hold the mid-lower switch on during the transition between the current PWM period and the next PWM period.

When the current flows from the electrical machine into the converter and wherein when the controller switched the lower pair of switches and held the mid-lower switch on during the transition from the previous PWM period into the current PWM period, and wherein the controller is due to control the upper switch in the current PWM period, the controller may be configured to hold the upper switch off during the current PWM period. The controller may be configured to switch the upper switch in the next PWM period.

In the two-level switching mode the controller may control the upper switch and lower switch to generate the respective phase AC output voltage. Alternatively, in the two-level switching mode the controller may control the upper pair of switches or the lower pair of switches to generate the respective phase AC output voltage.

In the three-level switching mode, the controller may control the upper pair of switches and lower pair of switches to generate the respective phase AC output voltage.

We also describe a converter for generating a multi-phase voltage for powering an electrical machine, comprising: inputs for receiving a positive DC input voltage and a negative DC input voltage; a plurality of AC outputs, one per phase, for outputting a multiphase AC output voltage for driving an electrical machine; for each phase, a plurality of switches arranged between the DC input and the respective AC phase output in a t-type arrangement, the t-type arrangement comprising an upper switch coupled between a positive DC input and the respective AC phase output, a lower switch coupled between the respective AC phase output and negative DC input, and a mid-upper switch and a mid-lower switch coupled between the AC phase output and a second DC input voltage, the switches being arranged in respective upper and lower pairs of switches, the upper pair comprising the upper and mid-lower switches and the lower pair of switches comprising the lower and mid-upper switches, and the second DC input voltage being a voltage between the positive and negative DC input voltages; a controller for controlling each of the switches in a three-level configuration using Pulse Width Modulation (PWM) over a plurality of PWM periods to generate the multi-phase AC output voltages for an electrical machine, wherein the controller is configured, for each PWM period, to clamp the respective phase output voltage to the second DC voltage during a switch transition of one or both of the switches forming the upper pair of switches or one or both of the switches forming the lower pair of switches.

By implementing such a commutation support technique in a converter, commutation glitches in the AC output voltage are mitigated, reducing output harmonics and increasing efficiency of the system.

The controller may be configured to clamp the respective phase output voltage to the second DC voltage by holding the mid-lower switch on during a switch transition of one or both of the switches forming the lower pair of switches.

The controller may be configured to clamp the respective phase output voltage to the second DC voltage by holding the mid-upper switch on during a switch transition of one or both of the switches forming the upper pair of switches.

When the controller switched the upper switch during the previous PWM period and when the controller switches the lower pair during the current PWM period, the controller may be configured only to turn on the mid-lower switch to clamp the respective phase output voltage to the second DC voltage after a deadtime period has expired.

When the controller switches the lower pair during the current PWM period and when the controller is due to switch the upper switch in the next PWM period, the controller may be configured to turn off the mid-lower switch a deadtime period before the end of the current PWM period.

When current flows from the electrical machine into the converter and wherein the controller switches the lower pair of switches in the current PWM period and wherein the controller is due to switch the lower pair of switches in the next PWM period, the controller may be configured to hold the mid-lower switch on during the transition between the current PWM period and the next PWM period. When the current flows from the electrical machine into the converter and wherein when the controller switched the lower pair of switches and held the mid-lower switch on during the transition from the previous PWM period into the current PWM period, and wherein the controller is due to control the upper switch in the current PWM period, the controller may be configured to hold the upper switch off during the current PWM period. The controller may be configured to switch the upper switch in the next PWM period.

The second DC input voltage may be generated from the positive and negative DC input voltages and a plurality of capacitors arranged between the positive DC input voltage and the negative DC input voltage. Alternatively, the second DC input voltage may be received from a second DC source.

In any of the above, the electrical machine may be an electrical motor or generator. The operating point of the electrical motor or generator may be based on one or more of motor torque and motor speed.

We also describe a method for generating a multi-phase voltage for powering an electrical machine, comprising: receiving a positive DC input voltage and a negative DC input voltage; receiving data representing a required operating point of the electrical machine; controlling a plurality of switches using Pulse Width Modulation (PWM) over a plurality of PWM periods to generate the multi-phase AC output voltages for an electrical machine, the plurality of switches being arranged in a plurality of groups, one per phase, wherein for each phase the group of switches are arranged between a DC input and a respective AC phase output in a t-type arrangement, the t-type arrangement comprising an upper switch coupled between a positive DC input and the respective AC phase output, a lower switch coupled between the respective AC phase output and negative DC input, and a mid-upper switch and a mid-lower switch coupled between the AC phase output and a second DC input voltage, the switches being arranged in respective upper and lower pairs of switches, the upper pair comprising the upper and mid-lower switches and the lower pair of switches comprising the lower and mid-upper switches, and the second DC input voltage being a voltage between the positive and negative DC input voltages; and outputting the multi-phase AC output voltages, for driving an electrical machine, wherein for each PWM period, controlling a plurality of the switches comprises: determining a switching mode for controlling one or more of the plurality of switches based on the required operating point of the electrical machine and based on load characteristic data for the required operating point of the electrical machine, the load characteristic data comprising a model defining one or more operating parameters of the electrical machine at a plurality of operating points; controlling one or more of the switches using PWM in a two-level configuration to generate the multi-phase AC phase output voltages when the switching mode is determined to be two-level; and controlling one or more of the switches using PWM in a three-level configuration to generate the three AC phase output voltages when the switching mode is determined to be three- level.

The operating parameters of the electrical machine at a plurality of operating points may comprise one or more of an EMI value, second DC input voltage value, switch thermal value, efficiency value, NVH (Noise Vibration and Harshness) value, electrical machine harmonics value, DC input voltage ripple value, and output voltage harmonics value.

The switching mode may be determined based on maintaining the one or more operating parameters at, above or below a respective threshold value.

When the operating parameter is an EMI value, the model comprises data defining a range of operating points having a predicted increase in potential EMI levels, and wherein a three-level switching mode may be determined if the desired operating point coincides with an operating point having a predicted increase in potential EMI levels.

When the operating parameter is a second DC input voltage value, a two-level switching mode may be determined if the second DC input voltage value is above a threshold value. The second DC input voltage value may comprise a magnitude value of ripple on the second DC input voltage, a two-level switching mode may be determined if the magnitude of the ripple on the second DC input voltage is above a threshold. Alternatively, the second DC input voltage value may comprise a magnitude of a voltage deviation from a nominal second DC input voltage value, a two-level switching mode may be determined if the magnitude of the voltage deviation away from the nominal second DC input voltage value is above a threshold value.

When the operating parameter is a switch thermal value, a two-level switching mode may be determined if the thermal value of the mid-lower switch or the mid-upper switch is above a threshold value. When the operating parameter is efficiency, the model may comprise efficiency data representing a plurality of operating points at which three-level operation would provide increased efficiency, and wherein the method further comprises comparing the required operating point of the electrical machine with the operating points of the efficiency data and determining a three-level switching mode if the required operating point and the operating point efficiency data coincide.

When the operating parameter is an NVH value, a three-level switching mode may be determined if the NVH value for the operating point is above a threshold value.

When the operating parameter is an electrical machine harmonics value, a three-level switching mode may be determined if the electrical machine harmonics value for the operating point is above a threshold value.

When the operating parameter is a DC input ripple voltage value, a three-level switching mode may be determined if the DC input ripple voltage value for the operating point is above a threshold value.

When the operating parameter is an output voltage harmonics value, a three-level switching mode may be determined if the output voltage harmonics value for the operating point is above a threshold value.

In any of the above described methods, when the switches are controlled in the three- level switch mode, the method may comprise clamping the respective phase output voltage to the second DC voltage during a switch transition of one or both of the switches forming the upper pair of switches or a during a switch transition of one or both of the switches forming the lower pair of switches.

Clamping the respective phase output voltage to the second DC voltage may comprise holding the mid-lower switch on during a switch transition of one or both of the switches forming the lower pair of switches. Clamping the respective phase output voltage to the second DC voltage may comprise holding the mid-upper switch on during a switch transition of one or both of the switches forming the upper pair of switches.

When the upper switch was switched during the previous PWM period and when the lower pair of switches are controlled during the current PWM period, the method may comprise only turning on the mid-lower switch to clamp the respective phase output voltage to the second DC voltage after a deadtime period has expired.

When the lower pair of switches are switched during the current PWM period and when the upper switch is due to be switched in the next PWM period, the method may comprise turning off the mid-lower switch a deadtime period before the end of the current PWM period.

When current flows from the electrical machine towards the switches and wherein the lower pair of switches are switched in the current PWM period and wherein the lower pair of switches are due to be switched in the next PWM period, the method may comprise holding the mid-lower switch on during the transition between the current PWM period and the next PWM period.

When the current flows from the electrical machine towards the switches and wherein when the lower pair of switches were switched and the mid-lower switch was held on during the transition from the previous PWM period into the current PWM period, and wherein the upper switch is due to be switched in the current PWM period, the method may comprise holding the upper switch off during the current PWM period. The method may further comprise switching the upper switch in the next PWM period.

In the two-level switching mode the method may comprise controlling the upper switch and lower switch to generate the respective phase AC output voltage. Alternatively, in the two-level switching mode the method may comprise controlling the upper pair of switches or the lower pair of switches to generate the respective phase AC output voltage. In the three-level switching mode, the method may comprise controlling the upper pair of switches and lower pair of switches to generate the respective phase AC output voltage.

We also describe a method for generating a multi-phase voltage for powering an electrical machine, comprising: receiving a positive DC input voltage and a negative DC input voltage; for each phase, a plurality of switches arranged between the DC input and the respective AC phase output in a t-type arrangement, the t-type arrangement comprising an upper switch coupled between a positive DC input and the respective AC phase output, a lower switch coupled between the respective AC phase output and negative DC input, and a mid-upper switch and a mid-lower switch coupled between the AC phase output and a second DC input voltage, the switches being arranged in respective upper and lower pairs of switches, the upper pair comprising the upper and mid-lower switches and the lower pair of switches comprising the lower and mid-upper switches, and the second DC input voltage being a voltage between the positive and negative DC input voltages; controlling a plurality of switches in a three-level configuration using Pulse Width Modulation (PWM) over a plurality of PWM periods to generate the multi-phase AC output voltages for an electrical machine, the plurality of switches being arranged in a plurality of groups, one per phase, wherein for each phase the group of switches comprises are arranged between a DC input and a respective AC phase output in a t-type arrangement, the t-type arrangement comprising an upper switch coupled between a positive DC input and the respective AC phase output, a lower switch coupled between the respective AC phase output and negative DC input, and a midupper switch and a mid-lower switch coupled between the AC phase output and a second DC input voltage, the switches being arranged in respective upper and lower pairs of switches, the upper pair comprising the upper and mid-lower switches and the lower pair of switches comprising the lower and mid-upper switches, and the second DC input voltage being a voltage between the positive and negative DC input voltages; and outputting of the multi-phase AC output voltages, for driving an electrical machine, wherein the method comprises, for each PWM period, clamping the respective phase output voltage to the second DC voltage during a switch transition of one or both of the switches forming the upper pair of switches or during a switch transition of one or both of the switches forming the lower pair of switches. Implementing such a commutation support method in a multi-level converter enables commutation glitches in the AC output voltage to be mitigated, reducing output harmonics and increasing efficiency of the system.

Clamping the respective phase output voltage to the second DC voltage may comprise holding the mid-lower switch on during a switch transition of one or both of the switches forming the lower pair of switches.

Clamping the respective phase output voltage to the second DC voltage may comprise holding the mid-upper switch on during a switch transition of one or both of the switches forming the upper pair of switches.

When the upper switch was switched during the previous PWM period and when the lower pair is switched during the current PWM period, the method comprises only turning on the mid-lower switch to clamp the respective phase output voltage to the second DC voltage after a deadtime period has expired.

When the lower pair of switches are switched during the current PWM period and when the upper switch is due to be switched in the next PWM period, the method comprises turning off the mid-lower switch a deadtime period before the end of the current PWM period.

When current flows from the electrical machine towards the switches and wherein the lower pair of switches are switched in the current PWM period and wherein the lower pair of switches are due to be switched in the next PWM period, the method comprises holding the mid-lower switch on during the transition between the current PWM period and the next PWM period.

When the current flows from the electrical machine towards the switches and wherein when the lower pair of switches were switched and the mid-lower switch was held on during the transition from the previous PWM period into the current PWM period, and wherein the upper switch is due to be switched in the current PWM period, the method comprises holding the upper switch off during the current PWM period. The method may further comprise switching the upper switch in the next PWM period. The electrical machine may be an electrical motor or generator. The operating point of the electrical motor or generator may be based on one or more of motor torque and motor speed.

LIST OF FIGURES

The present invention will now be described, by way of example only, and with reference to the accompanying figures, in which:

Figure 1 shows a simplified schematic of an inverter;

Figure 2 shows phase voltages (with respect to the 0V line) from a +DC and -DC bus at the output of the inverter of Figure 1 ;

Figure 3 shows the resulting line to line voltages at the output of the inverter of Figure 1 as seen by the electrical machine;

Figure 4 shows one example of a simplified layout of one solution for implementing a three-level converter, in this case a Series T-type arrangement;

Figure 5 shows an alternative T-type arrangement for a single phase. This arrangement is a so-called parallel T-type three level converter;

Figure 6 shows a simplified multi-phase (in this case 3-phase) converter with each phase have a three-level series t-type switch arrangement;

Figure 7 shows a simplified example of the two-level switching regions of operation (shown in white) and three-level regions of operation (grey) where the determination is made based on expected operating parameters for a given operating point of the motor (motor speed and torque in this example, but it may be determined by other parameters);

Figure 8 shows three possible switching patterns that are envisaged within a PWM period for a PWM control scheme; Figure 9 shows the scenario where the current direction is into the electrical machine for Pattern A (three-level upper pair switching) with no commutation support;

Figure 10 shows the scenario where the current direction is into the electrical machine for Pattern A (three-level upper pair switching) with commutation support added; the -DC and +DC rails may be avoided during the deadtimes between switches being turned off and turned on.

Figure 11 shows the scenario where the current direction is from the electrical machine (into the converter) for Pattern A (three-level upper pair switching) without commutation support added;

Figure 12 shows the scenario where the current direction is into the electrical machine for Pattern B (three-level lower pair switching) without commutation support added;

Figure 13 shows the scenario where the current direction is from the electrical machine into the converter for Pattern B (three-level lower pair switching) without commutation support added;

Figure 14 shows the scenario where the current direction is from the electrical machine into the converter for Pattern B (three-level lower pair switching) with commutation support added for the switch transitions;

Figure 15 shows the scenario where the current direction is from the electrical machine into the converter for Pattern B (three-level lower pair switching) with commutation support added for the switch transitions and for the transition to the next PWM period;

Figure 16 shows a proposed sequence of PWM periods when transitioning from a pattern B to a pattern A when the current is flowing from the electrical machine; and

Figure 17 shows a proposed sequence of PWM periods when transitioning from a pattern B to a pattern C when the current is flowing from the electrical machine. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In brief, we will describe a converter for generating a multi-phase output voltage that utilises a T-type arrangement of switches. In this arrangement, the converter is switchable between a two-level mode, where the Upper and Lower switches are controlled to generate the output phase AC voltage, and a three-level switching mode where the Upper pair of switches (Upper and Mid-Lower switches) and Lower pair of switches (Lower and Mid-Upper switches) are controlled to generate the output phase AC voltage. The proposed converter has an input for receiving data representing a required operating point of the electrical machine. A controller controls each of the switches using Pulse Width Modulation (PWM) over a plurality of PWM periods to generate the multi-phase AC output voltages for the electrical motor. However, the controller is configured, for each PWM period, to determine a two-level or three-level switching mode for controlling one or more of the plurality of switches based on the required operating point of the electrical machine and based on load characteristic data for the required operating point of the electrical machine.

We will also describe a commutation support technique that is useful for multi-level converters using three or more input voltage levels. The commutation support techniques provide a means of mitigating voltage in the output phase voltage when deadtimes are used between switching events. In this commutation support technique, the controller is configured, for each PWM period, to clamp the respective phase output voltage to the second DC voltage during a switch transition of one or both of the switches forming the upper pair of switches or one or both of the switches forming the lower pair of switches. As above, the upper pair of switches comprise the Upper and Mid-lower switches, and the lower pair of switches comprise the Lower and Mid-upper switches.

As some brief background, power converters are generally known. One example may be found in US8958222, from which FIG. 1 is taken, and shows a three phase two-level power inverter 100 for converting a DC power supply 101 to an AC output 103 which may then be connected to a load (not shown). The inverter comprises three separate phases 200, 300, 400 (also referred to as phases U, V, W respectively). Each phase includes two switches in series: 200a, 200b in phase 200/U; 300a, 300b in phase 300/V; and 400a, 400b in phase 400/W. Switches 200a, 300a and 400a are connected to the positive rail 105 (and may be referred to as the “upper” switches) and switches 200b, 3006 and 4006 are connected to the negative rail 107 (and may be referred to as the “lower” switches). In FIG. 1 , each switch may be an IGBT (insulated gate bipolar transistor) or MOSFET (metal-oxide-semiconductor field-effect transistor) and, for each IGBT or MOSFET, an associated anti-parallel diode may be used (not shown). However, any switches with fast switching capability may be used. A control system (such as a processor) (not shown) controls the switching of the switches 200a, 2006, 300a, 3006, 400a, 4006 to control the AC output of the inverter 100, often using Pulse Width Modulation (PWM) or variants of PWM. The power inverter also includes a DC bus capacitor 102, which provides a more stable DC voltage, limiting fluctuations as the inverter sporadically demands heavy current. This inverter is a so-called two-level inverter because each of the phases 200, 300, and 400 switch between two DC levels. In this case it is a DC voltage and ground, but it may also be positive DC and negative DC levels that the phases use.

A sinusoidal output current can be created at AC output 103 by a combination of switching states of the six switches using PWM switching patterns. However, the inverter 100 must be controlled so that the two switches in the same phase are never switched on at the same time, so that the DC supply 101 is not short circuited. Thus, if 200a is on, 2006 must be off and vice versa; if 300a is on, 3006 must be off and vice versa; and if 400a is on, 4006 must be off and vice versa.

FIG. 2 shows phase voltages (with respect to the 0V line shown in FIG. 1 , which is half of the de bus) with symmetric switching versus output voltage angle (with a DC bus of 250V and a 200V peak demand). FIG. 3 shows the resulting line to line voltage as seen by the electrical machine, for example a motor.

Two-level inverters switch the whole DC bus voltage every PWM period which produces large switching harmonics, particularly at low loads/output currents, which result in losses in the electrical loads, for example motors or generators.

A known technique to overcome at least some of the shortcomings of the two-level converters is to use a three-level converter.

Figure 4 shows one example of a simplified layout of one solution for implementing a three-level converter, in this case a Series T-type arrangement. This figure shows only one of the phases, in this case the equivalent of the U-phase 200 in figure 1. In this arrangement, the Upper (Q1) 200a and Lower (Q4) 200b are connected between the +DC and -DC supplies and provide the phase output 103. The Mid-Lower (Q3), 200d and Mid-Upper (Q2), 200c are connected between a Mid-DC voltage and the phase output 103. The Mid-DC is a DC voltage at a level between the +DC and -DC supplies. In this arrangement it is generated by a series network of capacitors 102a, 102b, although it may instead be provided from an external source. The Mid-DC voltage is not necessarily a voltage exactly in the middle of +DC and -DC, although it may be.

In the three-level configuration shown, the switches work in Upper and Lower pairs of switches. The Upper pair of switches comprise the Upper (Q1) 200a and Mid-Lower (Q3) 200d switches, and the Lower pair of switches comprise the Lower (Q4) 200b and MidUpper (Q2) 200c switches. The upper pair of switches can connect to +DC voltage or the mid-DC voltage, and the lower pair can connect to the mid-DC voltage and -DC voltage. Again, the switches are controlled by a controller and switches using PWM switching patters to generate the required phase output voltage. When the output phase voltage level is to be above the mid-DC voltage level then the upper pair is used. When the output phase voltage level is to be below the mid-DC voltage level then the lower pair is used. Each pair of switches is switching only half the DC voltage (if mid-voltage is in balance at half DC bus voltage).

Figure 5 shows an alternative T-type arrangement for a single phase. This arrangement is a so-called parallel T-type three level converter. The parallel T has two separate mid voltage connection paths, each has to have a blocking diode.

Figure 6 shows a simplified multi-phase (in this case 3-phase) converter with each phase have a three-level series t-type switch arrangement.

Switching at half of the DC bus greatly reduces the harmonics and the losses in the load. Some simulations have shown that a -80% reduction in WLTP (Worldwide Harmonised Light Vehicle Test Procedure) losses due to the PWM harmonics when a three-level inverter is used instead of a two-level inverter. For a standard saloon car this is about a -5% increase in range. However, prior art implementations of the three-level arrangement can increase the cost and complexity compared to a two-level converter due to the additional capacitors and switches that are fully rated to the +DC and -DC bus levels.

However, when one considers the electrical machines such as electrical motors in vehicles, the converter does not always need to be run as a three-level converter. This is due to the expected Mission Profiles for a particular application of the motor, for example as those used in the WLTP. Whilst running the converter as a three-level converter for all operating points of the electrical machine, as discussed above, there are additional costs and complexity involved in doing so.

As such, we have appreciated that for some operating points of the electrical machine it may be appropriate to run a converter in a three-level mode, and in other operating points it may be appropriate to run a converter in a two-level mode. The three-level mode may be used for example when there is a requirement to be more efficient, and then in operating regions where efficiency is not so important two-level operation may be more preferable. As will be discussed below, there are many factors that may influence the decision of whether to run the converter in a two- or three-level switching mode.

Two-Level and Three-Level Switchable Mode Converter

The T-type arrangement of switches provides a way of achieving a converter that is switchable between a two-level mode, where the Upper and Lower switches are controlled to generate the output phase AC voltage, and a three-level switching mode where the Upper pair of switches (Upper and Mid-Lower switches) and Lower pair of switches (Lower and Mid-Upper switches) are controlled to generate the output phase AC voltage.

T-type converters have lower conduction losses as only one switch is in series in the outer (+DC bus voltage or -DC bus voltage connected) switches. Since the mid switches (Mid-upper and Mid-lower) are not going to be used all the time (i.e. they are typically not needed for power generation when the converter is being run in a two-level mode), the mid switches can be half the voltage rating compared to the Upper and Lower switches, which need to be the full DC bus voltage rating.

This provides a cheaper solution to a full three-level converter having fully rated switches. In brief, the proposed converter has an input for receiving data representing a required operating point of the electrical machine. We will discuss the remainder of the examples using reference to an electrical motor or generator, but it would be understood that electrical machine may comprise other types of electrical load.

The desired or required operating point of the electrical motor may, for example be a speed and/or toque value, but it may be determined by other characteristics.

A controller controls each of the switches using Pulse Width Modulation (PWM) over a plurality of PWM periods to generate the multi-phase AC output voltages for the electrical motor. However, the controller is configured, for each PWM period, to determine a two- level or three-level switching mode for controlling one or more of the plurality of switches based on the required operating point of the electrical machine and based on load characteristic data for the required operating point of the electrical machine.

The load characteristic data is, for example, a model that defines one or more operating parameters of the electrical machine at a plurality of operating points. In practice this model may simply be a look up table of a plurality of operating parameters for each of the expected operating points of the motor, or it may be a more complex model. However the model is implemented, a decision of the switching mode may be made based on the required operating point of the motor and one or more the expected operating parameters for that operating point from the model.

The controller then controls one or more of the switches using PWM in a two-level configuration to generate the multi-phase AC phase output voltages when the switching mode is determined to be two-level, or the controller controls one or more of the switches using PWM in a three-level configuration to generate the three AC phase output voltages when the switching mode is determined to be three-level.

Whilst we discuss the arrangement being switchable between two-levels or three-levels, it would be apparent that this control scheme and method may be implemented on converters having more than three voltage levels, for example 4, 5, 6 or more. When the switching mode is determined to be a two-level switching mode, the controller controls the upper switch and lower switch to generate the respective phase AC output voltage. However, the controller may instead control the upper pair of switches (Upper and Mid-Lower) or lower pair of switches (Lower and Mid-Upper) to generate the respective phase AC output voltage. In this latter case where the Upper or Lower pairs of switches are used in the two-level mode, this may for example be a useful “limp-home” mode where either the Upper or Lower switch has been damaged, in which case the Upper pair (when the Lower switch is damaged) may be used to generate the output voltage in a two-level mode, or the Lower pair (when the Upper switch is damaged) may be used to generate the output phase voltage in a two-level mode.

When the switching mode has been determined to be three-level, the controller controls the upper pair of switches and lower pair of switches respectively to generate the respective phase AC output voltage.

The model defining one or more operating parameters of the electrical machine at a plurality of operating points may comprise, for example, one or more of an EMI value, second DC input voltage value, switch thermal value, efficiency value, NVH (Noise Vibration and Harshness) value, electrical machine harmonics value, DC input voltage ripple value, and output voltage harmonics value. This is not an exhaustive list. However, the determination of whether to be in a two-level switching mode or three-level switching mode is made based on one or more of these values and the desired operating point of the motor.

By using a more complex metric of one or more expected operating parameters for the electrical machine, this enables a more complex decision of switching modes to be made, that is it can be more than a simple determination of being in a three-level mode below 10%, 20% or 30% of the maximum current output. Instead, the more complex determination means that two-level or three-level switching modes can be made across the whole range of the operating points of the machine.

Figure 7 shows a simplified example of the two-level switching regions of operation (shown in white) and three-level regions of operation (grey) where the determination is made based on expected operating parameters for a given operating point of the motor (motor speed and torque in this example, but it may be determined by other parameters). We will now briefly discuss each of the operating parameters that may form part of the model in turn. In each of the cases, the controller is configured to determine the switching mode in order to maintain the one or more operating parameters at, above or below a respective threshold value relating to a particular operating parameter. The decision of which switching mode is chosen may depend on one operating parameter, or a combination of two or more operating parameters. The chosen operating parameter(s) may change from one PWM period to the next, or it may be the same operating parameter(s) over a plurality of PWM periods.

The operating parameter may be an EMI value. In this case, the model comprises data defining a range operating points having a predicted value or increase in potential EMI levels. The EMI values may cover potential EMI values for the electrical machine, the converter, other noise generating components forming the system and any combination of these components for a plurality of the operating points of the electrical machine.

If EMI value is chosen as the operating parameter, the controller is configured to determine a three-level switching mode if the desired operating point coincides with an operating point having a predicted increase in potential EMI levels. The rationale behind this decision is that a predicted increase in potential EMI values may at least be mitigated, or the potential EMI values of the electrical machine, converter and/or system be reduced by selecting a three-level mode, which is known to have lower potential EMI values due to the reduced switching voltage in a multi-level switching scheme when compared to a two-level switching scheme.

The operating parameter may be a second DC input voltage value. Two scenarios are envisaged, although there may be more that would be apparent to the skilled reader.

In a first aspect, the second DC input voltage value may relate to the amount of voltage ripple on the second DC input voltage value. The switching of the Mid-Upper and MidLower switches affects the value of ripple on the second DC input voltage value, and excessive ripple values can adversely affect the performance and efficiency of the converter, and also introduce harmonics into the electrical machine. As such, if the magnitude of the ripple begins to exceed a predefined threshold level, the controller is configured to determine a two-level switching mode. By switching into the two-level mode, the ripple on the second DC input voltage does not influence the phase output voltage. Once the magnitude of the ripple drops below the threshold value, the controller may determine the switching mode to be three-level again.

In a second aspect, the second DC input voltage value may comprises a magnitude of a voltage deviation from a nominal second DC input voltage value. This deviation is a longer term drift of the voltage away from a nominal operating voltage value of the second DC input voltage. Over time, the capacitors’ store of energy can become depleted, causing, in this case, a drift of the second DC input voltage value. In such cases, the controller may be configured to determine a two-level switching mode if the magnitude of the voltage deviation away from the nominal second DC input voltage value is above a threshold value. By switching into a two-level mode, this allows the capacitors generating the second DC input voltage to replenish their charge and for the second DC input voltage value to stabilise. Once the second DC input voltage value deviation falls below the threshold magnitude, the controller may switch back into the three-level switching mode.

If the operating parameter is a switch thermal value, a determination of which of the two- level or three-level switching modes may be made based on an expected thermal performance of one or both of the mid-lower and mid-upper switches. Since the mid switches for the three-level mode in the present invention are rated to work at lower operating voltages and currents than the upper and lower switches, the thermal performance of the mid switches is different. If the operating temperature is expected to rise above a threshold, the controller may be configured to revert to a two-level switching mode for one or more PWM periods in order to cool the mid switches. The controller may switch back to a three-level switching mode when the operating conditions allow and the expected thermal value goes below a threshold value.

If the operating parameter is efficiency, the model may comprise efficiency data representing a plurality of operating points at which three-level operation would provide increased efficiency compared to a two-level switching mode. Across the whole operating range of the electrical machine, there regions of operating points at which increased efficiency is preferable. Whether or not increased efficiency is preferable may be based on several factors including, for example, the time spent at that operating point, a measure of the efficiency benefit (comparing to a two-level mode), whether that region coincides with WLTP mission profiles and others. The controller compares the required operating point of the electrical machine with the operating points of the efficiency data and determine a three-level switching mode if the required operating point and the operating point efficiency data coincide.

If the operating parameter is an NVH value (Noise, Vibration and Harshness), a determination of which of the two-level or three-level switching modes may be made on an expected NVH value for that operating point. For example, if it is known for that operating point that the expected NVH is increased or above a threshold i.e. tolerable, level, then the controller is configured to determine a three-level switching mode. The rationale behind this decision is that harmonic content is reduced due to the reduced voltage level switching. If the expected NVH decreases or is below a threshold value, then the controller may switch back to a two-level switching mode, or the controller may stay in a three-level switching mode.

If the operating parameter is an electrical machine harmonics value, the controller is configured to determine a three-level switching mode if the electrical machine is expected to experience an increase in the electrical machine harmonics, or a level that is above a threshold or tolerable level at that particular operating point of the electrical machine. Electrical machine harmonics may manifest as additional loss terms in the electrical machine.

If the operating parameter is a DC input ripple voltage value, this may relate to the amount of voltage ripple on +DC input voltage source and/or the -DC input voltage source. The switching of the Upper and Lower switches may affect the voltage supply from the DC capacitors, and excessive ripple values can adversely affect the performance and efficiency of the converter, and also introduce harmonics into the electrical machine. As such, if the magnitude of the ripple begins to exceed a predefined threshold level, the controller is configured to determine a three-level switching mode. By switching into the three-level mode, the ripple on the DC supply input voltages can be reduced. Once the magnitude of the ripple drops below the threshold value, the controller may determine the switching mode to be two-level again.

If the operating parameter is an output voltage harmonics value, which for example may include electrical harmonic components in the phase output voltage the controller nay be configured to determine a three-level switching mode if the output voltage harmonics value for the operating point is above a threshold value. Harmonics in the phase output voltage are a consequence of the two-level switching of the full DC rail supply voltages. Switching to a three-level switching mode in this instance enables the converter to reduce the amount of harmonic content reaching the phase output voltage.

In any of the above examples, we have discussed the second DC input voltage being provided by a capacitor network between the +DC supply bus and the -DC supply bus. It will of course be understood that the second DC input voltage may instead be provided by an external secondary DC supply. Furthermore, the second DC input voltage in either case may be a voltage value between the +DC supply bus and the -DC supply bus. Preferably the second DC input voltage is approximately mid-way between the two +DC and -DC supply bus, but it need not be.

Commutation Support

In any converter, where switches are turning on and off in sequence, either to connect the output phase to the +DC supply, -DC supply or the second DC voltage source, switches take time to turn off. The time taken to turn off can vary by component batch, operating temperature and operating condition. As such, control schemes implemented in converters employ a “deadtime”, which is a period when no switch is on that is inserted between one switch turning off and another turning on. Without deadtime, the supply rails could be connected together, which would result in damage.

However, implementing switching deadtime support on a three-level converters may sometimes result in large switching voltage spikes during that deadtime period when no switches are open.

Each of the switches comprises an anti-parallel diode to provide a current path when the devices are off. This is called a commutation path. In between switching events (i.e. after a switch turns off and before the next switch turns on), both devices will be off during the deadtime inserted to protect the devices form shorting the supply rails.

As an example, consider the situation where the upper pair are being switched, that is the Upper and mid-lower are being controlled in sequence, first the upper and then the mid-lower. At the beginning of the PWM period the upper switch is conducting (for the example, we are assuming that the current flows into the output phase i.e. towards the electrical machine).

When the upper switch turns off the lower switch’s anti-parallel diode will conduct as the current (through the inductive load that is the electrical machine) has to keep flowing. This pulls the phase output voltage towards -DC supply, as the lower switch is connected to -DC supply.

In an example where the mid-lower is turning off, and there is a deadtime before the upper switch turns back on again, the resulting commutation glitch (from the low midswitch turning off) at the phase output voltage produces a glitch where the voltage momentarily drops to the -DC supply rail from the second DC voltage. If this is immediately followed by the upper switch turning on, the phase output voltage is then connected to the +DC supply rail, which is the full voltage transition from -DC to +DC, and not the intended voltage from the second DC supply to the +DC rail as desired by three-level operation.

These commutation glitches can result in increased harmonics in the phase output voltage and increased potential EMI due to the increased number of switch edges. Furthermore, commutation glitches can result in increased stresses in the power devices and other components.

We have therefore appreciated the need for an improved control scheme that provides commutation support to reduce the possibility of these commutation glitches during switch transitions.

In brief, the present invention provides a controller and method of generating a multiphase output voltage where the wherein the controller is configured, for each PWM period, to clamp the respective phase output voltage to the second DC voltage during a switch transition of one or both of the switches forming the upper pair of switches or one or both of the switches forming the lower pair of switches. As above, the upper pair of switches comprise the Upper and Mid-lower switches, and the lower pair of switches comprise the Lower and Mid-upper switches. Clamping to the second DC voltage is achieved by holding the mid-lower switch on during a switch transition of one or both of the switches forming the lower pair of switches, or holding the mid-upper switch on during a switch transition of one or both of the switches forming the upper pair of switches.

Figure 8 shows three possible switching patterns that are envisaged within a PWM period for a PWM control scheme. Pattern A relates to the Upper pair of switches being controlled to produce the phase output voltage (so the output phase voltage is above the second DC voltage), pattern B relates to the Lower pair of switches being controlled to produce the phase output voltage (so the output phase voltage is below the second DC voltage).

Pattern C relates to the Upper and Lower switches being controlled to produce the phase output voltage. Pattern C is in two-level operation.

The relative on and off times for each the switches within each of these PWM periods can be varied to produce the required portion of the phase output voltage.

Pattern A can transition from one PWM period to the next PWM period to Pattern B or C. Pattern B can transition from one PWM period to the next PWM period to Pattern C or A. Pattern C can transition from one PWM period to the next PWM period to Pattern A or B. Alternatively, the patterns may remain the same pattern from one PWM period to the next PWM period.

How the commutation support may be provided within each PWM period (Patterns A, B and C) during those switch transitions will be described. We will also discuss the commutation support that may be provided when the control scheme transitions from one pattern to the next, or remains the same. We will also discuss the current flowing into the electrical machine, and current flowing from the electrical machine into the converter (for example when the electrical machine is a generator).

Figure 9 shows the scenario where the current direction is into the electrical machine for Pattern A (three-level upper pair switching) with no commutation support. Initially the upper switch is ON and the current flows from the +DC to the electrical machine. The Vphase (that is the output phase voltage) is at the +DC level. The upper switch turns off and there is a deadtime before the Midjower can turn on during which the current still needs to flow. The only path is through the anti-parallel diode in the lower switch. As current flows through the anti-parallel diode of the lower switch, the Vphase is clamped down to the -DC rail, which is a change of the full DC voltage.

The Midjower switch is then turned on and current can flow from the second DC voltage resulting in the Vphase moving to the second DC voltage level.

The mid-lower switch then turns off and there is a deadtime before the upper switch can turn on during which the current still needs to flow. The only path is through the antiparallel diode in the lower switch, which again causes the Vphase to be clamped down to the -DC rail. The upper switch then turns on, which results in the Vphase returns to +DC from the -DC rail, which is the full DC voltage (-DC rail to +DC rail).

Figure 10 shows the scenario where the current direction is into the electrical machine for Pattern A (three-level upper pair switching) with commutation support added.

Initially the upper switch is ON and the current flows from the +DC to the electrical machine. The Vphase is at the +DC rail voltage. The upper turns off and there is a deadtime before the Midjower can turn on during which the current still needs to flow.

For the commutation support, the Mid-Upper switch is used to clamp the Vphase to the second DC voltage. Since the Mid_Upper is already on, current can flow from the second DC voltage through the Mid_Upper then through the Midjower’s anti-parallel diode during the deadtime between the Upper and Mid-Lower switches being switched on so that the Vphase voltage is clamped to the second DC voltage level.

The Midjower then turns on and current can flow from the second DC voltage resulting in the Vphase moving to the mid voltage. Note that the action of turning on the Midjower does not change the Vphase, but instead permits the switch to take the current rather than Midjower’s anti-parallel diode. The same commutation path is used on the return to the upper being on. As can be seen, using this commutation support scheme, commutation glitches between the -DC and +DC rails may be avoided during the deadtimes between switches being turned off and turned on.

Figure 11 shows the scenario where the current direction is from the electrical machine (into the converter) for Pattern A (three-level upper pair switching) without commutation support added.

Initially the upper switch is ON and the current flows from the electrical machine to the +DC rail. Note that the upper switch need not be on for this to happen as the upper switch’s anti-parallel diode would conduct. The Vphase is at the +DC.

The upper switch turns off and there is a deadtime before the Midjower can turn on during which the current still needs to flow. The current continues to flow through the upper switch’s anti-parallel diode so the Vphase remains clamped at the +DC.

The Midjower switch turns on and current can flow from the second DC voltage resulting in the Vphase moving to the second DC voltage. Note that the Mid_upper switch does not need to be on as current will flow through the Mid_upper switch’s anti-parallel diode. However, there are fewer losses for the current to flow through a switch rather than the diode as the diodes are not as highly rated.

The same commutation path is used on the return to the upper being on.

There is no deadtime commutation issues with this scenario, however providing the commutation support as for Pattern A when the current flows into the electrical machine as described with reference to Figure 10, the Mid_upper being ON will reduce the losses in its anti-parallel diode.

Figure 12 shows the scenario where the current direction is into the electrical machine for Pattern B (three-level lower pair switching) without commutation support added.

Initially the Mid-upper switch is ON and the current flows from the second DC voltage to the electrical machine. Note that the Mid-lower does not need to be on as current will flow through the Mid-lower’s anti-parallel diode. The mid-lower switch may be switched on as it is better for the current to flow through a switch than a diode as the diodes are not as highly rated.

The Mid-upper switch turns off and there is a deadtime before the Lower switch can turn on during which the current still needs to flow. The only path is through the anti-parallel diode in the lower switch. As current flows the Vphase is clamped down to the -DC rail, which is fine as the next state will be the -DC rail.

The Lower switch turns on and the current continues to come from the -DC rail, but through the switch rather than the anti-parallel diode. The switch has a higher rating which reduces losses.

The same commutation path is used on the return to the mid-upper switch being on.

There is no deadtime commutation issues with the lower pair switching when the current direction is into the electrical machine, but the Midjower switch being ON will reduce the losses in its anti-parallel diode.

Figure 13 shows the scenario where the current direction is from the electrical machine into the converter for Pattern B (three-level lower pair switching) without commutation support added.

Initially the Mid-upper switch is ON and the current flows from the electrical machine to the second DC voltage.

The Mid_upper switch turns off and there is a deadtime before the Lower switch can turn on during which the current still needs to flow. The only path is through the anti-parallel diode in the upper switch. As current flows the Vphase is clamped up to the +DC which causes the next switch event to be from the full +DC.

The Lower switch turns on and Vphase is clamped to the -DC rail.

The lower switch turns off and there is a deadtime before the mid-upper switch can turn on during which the current still needs to flow. The only path is through the anti-parallel diode in the upper switch. As current flows the Vphase is clamped up to the +DC which causes a change of be the full +DC from the -DC.

The Mid_upper is ON and the current flows from the motor to the second DC voltage.

As can be seen, the deadtime events when the current is from the electrical machine when the switching pattern relates to the lower pair of switches cause commutation glitches that cause the output phase voltage to switch between the -DC rail and +DC rail.

Figure 14 shows the scenario where the current direction is from the electrical machine into the converter for Pattern B (three-level lower pair switching) with commutation support added for the switch transitions. For the moment, we will refer to this scenario as a partial commutation support, where commutation support is provided for the switch transitions during the PWM period. This is referred to as a partial support due to the current flow between the current and next PWM periods when the switching pattern is pattern B for the current flowing from the electrical machine. We will discuss this below.

Focussing on the first PWM period for the moment, initially the Mid_upper switch is ON and the current flows from the electrical machine to the second DC voltage.

The Mid_upper switch turns off and there is a deadtime before the Lower switch can turn on during which the current still needs to flow. The path is through the Midjower switch, which is ON, and the Mid_upper switch’s anti-parallel diode. Vphase is clamped to the second DC voltage.

The lower switch is then turned ON and the current flows from the motor to the -DC rail.

The lower switch turns off and there is a deadtime before the Mid_upper switch can turn on during which the current still needs to flow. The path is through the Midjower switch, which is ON, and the Mid_upper switch’s anti-parallel diode. Vphase is clamped to the second DC voltage.

The Mid_upper switch turns on and the Vphase continues at the second DC voltage. However, the Midjower switch needs to turn off to provide a deadtime at the end and start of the PWM period to allow safe changing between patterns (for example to pattern A or C). This has the effect of removing the commutation support briefly during which the current flows through the upper and the Vphase clamps to the +DC before returning to second DC voltage when the Midjower switch returning to the ON state.

This momentary move to the +DC is only a half voltage change, but does result in excessive switching loss and harmonic content. As such additional support may be preferable during some transitions between PWM periods and switching patters.

Figure 15 shows the scenario where the current direction is from the electrical machine into the converter for Pattern B (three-level lower pair switching) with commutation support added for the switch transitions and for the transition to the next PWM period.

Initially the Mid_upper switch is ON and the current flows from the electrical machine to the second DC voltage.

The Mid_upper switch turns off and there is a deadtime before the Lower switch can turn on during which the current still needs to flow. The path is through the Midjower switch, which is ON, and the Mid_upper switch’s anti-parallel diode. Vphase is clamped to the second DC voltage.

The lower switch is then turned ON and the current flows from the motor to the -DC.

The lower switch turns off and there is a deadtime before the Mid_upper switch can turn on during which the current still needs to flow. The path is through the Midjower switch, which is ON, and the Mid_upper switch’s anti-parallel diode. Vphase is clamped to the second DC voltage.

The Mid_upper switch turns on and the Vphase continues at the second DC voltage.

The Midjower switch does not need to turn off as deadtime between pattern changes in this scenario is not required. Some solutions include inserting a “safe” pattern in between the change or preventing the upper to switch for the first period of the new A or C pattern whenever transitioning from a pattern B. Both these techniques cause a one period discontinuity in the phase output which produces noise and EMC emissions. They can also destabilise the controller current loops.

However, pattern change deadtime support is not required between each PWM switching pattern transition. Pattern change deadtime support is only required when the current is from the electrical machine into the converter, so our approach uses the current direction to decide whether to move to the full commutation support (as shown in figure 15) while switching the lower pair in pattern B (i.e. the lower pair of switches) when the next PWM period will also be a pattern B.

When transitioning from a full support pattern B to a pattern requiring switching of the upper switch (pattern A or C), additional considerations are required in order to avoid switch shorting.

Figure 16 shows a proposed sequence of PWM periods when transitioning from a pattern B to a pattern A when the current is flowing from the electrical machine.

In order to mitigate any shorting between the upper switch being turned on when the mid-upper is still on at the end of the previous PWM period (when the current is from the electrical machine and the previous PWM switching pattern was Pattern B - we have referred to this pattern as Bnegative as by convention the current is flowing into the converter), the method controls the switches such that the upper switch is not turned on for one PWM period. Since the current direction is from the electrical machine the absence of the upper switch switching (for the first PWM period of the pattern A or C) has no effect on the voltage as the current direction means that the voltage will naturally clamp to +DC due to the upper switch’s anti-parallel diode. As such, the Vphase will be clamped to the +DC when the Mid_upper is not on as the current will flow through the upper switch’s anti-parallel diode.

The disadvantage is a slight increase in losses during the first new pattern PWM period as the upper switch’s anti-parallel diode is not as efficient as the switch. However, since this is only for one PWM period, and this technique is only required for the scenario when the switching pattern is B for the current flowing from the electrical machine, the method does not cause disturbance to the phase voltage and the slight increase on loss is negligible.

Figure 17 shows a proposed sequence of PWM periods when transitioning from a pattern B to a pattern C when the current is flowing from the electrical machine.

The scenario with the switching during the transition from pattern B to pattern C when the current is flowing from the electrical machine as shown in figure 17 is the same as with that shown in Figure 16. Again, the Upper switch is held off for a PWM period.

The decision of which type of commutation support is required during the PWM period and bridging between adjacent periods may be made, for example, using a state machine. Other decision logic will, of course, be clear to the skilled reader.

Summarising the various states, the methods may be described as follows:

• For Pattern A (Upper pair of switches: three-level) o If previous PWM period was a pattern B with current from the electrical machine: hold the upper switch off for one PWM period o Else: normal operation of upper pair of switches

• For Pattern B (Lower pair of switches: three-level) o If current from electrical machine: midjower switch is held on through the whole pattern o Else: Midjower switch has deadtimes at beginning and end of period

• For Pattern C (Upper and Lower switches: two-level): o If previous PWM period was a pattern B with current from the electrical machine: hold the upper switch OFF for one PWM period o Else: normal operation of upper and lower switches

By using the commutation support schemes described above, a reduction is the harmonic content of the output phase voltage can be demonstrated.

The commutation support techniques have been described within the context of a switchable two-level and three-level converter. However, the above-described commutation support techniques may also be implemented in pure (i.e. non-switchable) multi-level converter topologies. For example, the commutation support technique may be implemented on a 3, 4, 5, 6 or higher-level converter without any need for the converter to be switchable between those levels and two-levels.

Furthermore, whilst we discuss and exemplify three-phase voltage generation, the described switchable two-level and three-level converter and the commutation support work also for higher number of phase outputs. As such, the techniques work also with a multi-phase output voltage generation.

No doubt many other effective alternatives will occur to the skilled person. It will be understood that the invention is not limited to the described embodiments and encompasses modifications apparent to those skilled in the art lying within the scope of the claims appended hereto.