Title:
TRANSISTOR AND MANUFACTURING METHOD THEREFOR, AND MEMORY
Document Type and Number:
WIPO Patent Application WO/2023/231077
Kind Code:
A1
Abstract:
The present disclosure relates to the technical field of semiconductors, and provides a transistor and a manufacturing method therefor, and a memory, used for solving the technical problem of large reverse leakage currents of transistors. The transistor comprises: a channel, in which an accommodating space is formed; a gate, having a first end and a second end which are opposite to each other, the first end of the gate being located in the accommodating space, and the second end of the gate being located outside the accommodating space; a dielectric layer, located between the gate and the channel and insulating and isolating the gate and the channel; a source, provided on one end of the channel; and a drain, provided on the other end of the channel, the drain and the source being spaced apart along the length direction of the channel. The materials of the source, drain, and channel are all semiconductor materials, so that semiconductor-semiconductor contact is formed between the source and the channel and between the drain and the channel, a Schottky barrier is overcome, and a reverse leakage current of the transistor is small, thereby improving the performance of the transistor.
Inventors:
LIU YOUMING (CN)
XIAO DEYUAN (CN)
XIAO DEYUAN (CN)
Application Number:
PCT/CN2022/098249
Publication Date:
December 07, 2023
Filing Date:
June 10, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L29/78
Foreign References:
| US20120161229A1 | 2012-06-28 | |||
| US20200381450A1 | 2020-12-03 | |||
| US20130264621A1 | 2013-10-10 | |||
| US20030139011A1 | 2003-07-24 | |||
| CN1458683A | 2003-11-26 | |||
| US20210020747A1 | 2021-01-21 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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