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Title:
THREE-DIMENSIONAL MEMORY DEVICES AND FABRICATING METHODS THEREOF
Document Type and Number:
WIPO Patent Application WO/2023/164911
Kind Code:
A1
Abstract:
Embodiments of three-dimensional memory devices are disclosed. A disclosed memory structure can comprises a memory cell, a bit line contact coupled to the memory cell, a bit line coupled to the bit line contact, a source line contact coupled to the memory cell, and a source line coupled to the source line contact. The memory cell comprises a cylindrical body having a cylindrical shape, an insulating layer surrounding the cylindrical body, a word line contact surrounding a first portion of the insulating layer, the word line contact coupled to a word line, and a plurality of plate line contact segments surrounding a second portion of the insulating layer, the plurality of plate line contact segments coupled to a common plate line.

Inventors:
YANG YUANCHENG (CN)
ZHAO DONGXUE (CN)
YANG TAO (CN)
LIU LEI (CN)
WANG DI (CN)
ZHANG KUN (CN)
ZHOU WENXI (CN)
XIA ZHILIANG (CN)
HUO ZONGLIANG (CN)
Application Number:
PCT/CN2022/079162
Publication Date:
September 07, 2023
Filing Date:
March 04, 2022
Export Citation:
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Assignee:
YANGTZE MEMORY TECH CO LTD (CN)
International Classes:
G11C11/401; H01L29/66; H01L29/78; H01L29/786
Domestic Patent References:
WO2022149228A12022-07-14
Foreign References:
US20120092925A12012-04-19
CN114005825A2022-02-01
US20120092925A12012-04-19
CN114005825A2022-02-01
Other References:
SAKUI KOJI ET AL: "Dynamic Flash Memory with Dual Gate Surrounding Gate Transistor (SGT)", 2021 IEEE INTERNATIONAL MEMORY WORKSHOP (IMW), IEEE, 16 May 2021 (2021-05-16), pages 1 - 4, XP033920264, DOI: 10.1109/IMW51353.2021.9439614
BRYON MOYER: "Will Monolithic 3D DRAM Happen?", SEMICONDUCTOR ENGINEERING, 9 September 2021 (2021-09-09), XP055945997, Retrieved from the Internet [retrieved on 20220725]
Attorney, Agent or Firm:
NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD. (CN)
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