Title:
STORAGE CELL, AND THREE-DIMENSIONAL MEMORY AND OPERATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2023/077264
Kind Code:
A1
Abstract:
The present invention provides a storage cell, comprising: a channel layer array comprising N channel layers, the N channel layers being vertically provided on a substrate in a first direction, a tunneling layer and a storage layer being sequentially provided outside the N channel layers, and N being a positive integer; N heat conduction cores respectively located in the N channel layers and penetrating through the substrate; and a thermocouple array comprising a thermocouple word line layer growing on the substrate in a negative direction of the first direction and N thermocouple layers located on the thermocouple word line layer, the N thermocouple layers being connected to the N heat conduction cores in a one-to-one correspondence mode. A first potential difference is applied between the thermocouple word line layer and a part of the thermocouple layers in the N thermocouple layers, and the heat conduction core connected to the part of the thermocouple layers is heated, such that the channel layer and the storage layer corresponding to the heat conduction core are respectively kept at a first preset temperature and a second preset temperature under the heat insulation effect of the tunneling layer. The present invention further provides a three-dimensional memory and an operation method therefor.
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Inventors:
ZHANG GANG (CN)
LI CHUNLONG (CN)
HUO ZONGLIANG (CN)
YE TIANCHUN (CN)
LI CHUNLONG (CN)
HUO ZONGLIANG (CN)
YE TIANCHUN (CN)
Application Number:
PCT/CN2021/128164
Publication Date:
May 11, 2023
Filing Date:
November 02, 2021
Export Citation:
Assignee:
INST OF MICROELECTRONICS CAS (CN)
International Classes:
H01L23/34; G11C16/04; G11C16/26
Foreign References:
| US20130058163A1 | 2013-03-07 | |||
| CN103247337A | 2013-08-14 | |||
| CN113169188A | 2021-07-23 | |||
| CN111373535A | 2020-07-03 |
Other References:
WONJOO KIM ; SANGMOO CHOI ; JUNGHUN SUNG ; TAEHEE LEE ; CHULMIN PARK ; HYOUNGSOO KO ; JUHWAN JUNG ; INKYONG YOO ; YOONDONG PARK: "Multi-layered Vertical Gate NAND Flash overcoming stacking limit for terabit density storage", VLSI TECHNOLOGY, 2009 SYMPOSIUM ON, IEEE, PISCATAWAY, NJ, USA, 16 June 2009 (2009-06-16), Piscataway, NJ, USA , pages 188 - 189, XP031507148, ISBN: 978-1-4244-3308-7
Attorney, Agent or Firm:
CHINA SCIENCE PATENT & TRADEMARK AGENT LTD. (CN)
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