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Patent Searching and Data


Title:
SIGNAL SELECTION CIRCUIT AND SIGNAL SELECTION METHOD
Document Type and Number:
WIPO Patent Application WO/2012/081196
Kind Code:
A1
Abstract:
The objective of the present invention is seamless switching of signals selectively output from a plurality of redundant signals, even if the switching is performed in response to the detection of a malfunction in the output signal. In the signal selection circuit of the present invention, among a plurality of externally supplied signals, a certain signal is input as a main signal, and the other signals are input as spare signals. The signal selection circuit is provided with: a malfunction detection circuit which detects a malfunction at the input stage with respect to a signal input as the main signal; a selection circuit which, during the normal state, selects and outputs the signal input as the main signal from the plurality of signals, and when the malfunction detection circuit detects a malfunction regarding the signal input as the main signal, switches the signal to a signal input as a spare signal and outputs the signal; and a delay circuit which delays the signal input as the main signal for a delay time equal to or longer than the total time of the detection time in the malfunction detection circuit and the signal switching time in the selection circuit, and outputs the signal to the selection circuit.

Inventors:
TAZAKI YUICHI (JP)
Application Number:
PCT/JP2011/006814
Publication Date:
June 21, 2012
Filing Date:
December 06, 2011
Export Citation:
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Assignee:
NEC CORP (JP)
TAZAKI YUICHI (JP)
International Classes:
H04B1/74; G06F1/04; H04L69/14; H04L69/40
Foreign References:
JPH05235887A1993-09-10
JPH03195114A1991-08-26
JP2010146352A2010-07-01
Attorney, Agent or Firm:
IEIRI, Takeshi (JP)
House ON 健 (JP)
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Claims: