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Patent Searching and Data


Title:
SEMICONDUCTOR STRUCTURE PREPARATION METHOD AND SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2024/077827
Kind Code:
A1
Abstract:
The present disclosure relates to a semiconductor structure preparation method and a semiconductor structure. The semiconductor structure preparation method comprises: providing a substrate; according to a preset rule, forming, on the substrate, chip structures and cutting channels which are alternately distributed in a first direction, and initial trench isolation structures located in the cutting channels, the material of the initial trench isolation structures being a first insulating material; etching the initial trench isolation structures to obtain preset isolation trenches; the preset isolation trenches exposing a target reference layer, the target reference layer being a layer adjacent to the initial trench isolation structures in a thickness direction thereof; and filling the preset isolation trenches with a second insulating material, the hardness of the second insulating material being greater than that of the first insulating material.

Inventors:
QIAN LONG (CN)
YANG QI (CN)
KIM BYUNGSOO (CN)
ZHAO DANDAN (CN)
ZHOU HAOLEI (CN)
Application Number:
PCT/CN2023/076179
Publication Date:
April 18, 2024
Filing Date:
February 15, 2023
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L21/762
Foreign References:
CN114203648A2022-03-18
CN105374762A2016-03-02
CN112018027A2020-12-01
CN113937065A2022-01-14
CN114823315A2022-07-29
US20090218590A12009-09-03
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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