Title:
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/082611
Kind Code:
A1
Abstract:
A semiconductor structure and a manufacturing method therefor. The manufacturing method comprises: providing a substrate (1), wherein the substrate (1) comprises a first region (11) and a second region (12); sequentially forming on the substrate (1) a gate dielectric layer (2), a gate material layer (3) and a barrier material layer (4); doping the barrier material layer (4) with first-type elements, such that the first-type elements gather in the barrier material layer (4), wherein the barrier material layer (4) can block the first-type elements from entering the gate material layer (3); at least removing the barrier material layer (4) directly above the second region (12), and at least reserving the barrier material layer (4) directly above the first region (11); doping the gate material layer (3), which is directly above the second region (12), with second-type elements; and performing a heat treatment, such that the first-type elements gathering in the barrier material layer (4) diffuse into the gate material layer (3), which is directly above the first region (11).
Inventors:
HU JIANCHENG (CN)
Application Number:
PCT/CN2023/092598
Publication Date:
April 25, 2024
Filing Date:
May 06, 2023
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/092
Foreign References:
| US20040002185A1 | 2004-01-01 | |||
| US20060223249A1 | 2006-10-05 | |||
| US5981320A | 1999-11-09 | |||
| CN101315886A | 2008-12-03 |
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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