Title:
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR, SUB-WORD LINE DRIVER, AND MEMORY
Document Type and Number:
WIPO Patent Application WO/2023/245775
Kind Code:
A1
Abstract:
Disclosed in the embodiments of the present disclosure are a semiconductor structure and a manufacturing method therefor, a sub-word line driver, and a memory. The semiconductor structure comprises: a substrate; and a first conductive-type transistor region, which is located on the substrate, wherein the first conductive-type transistor region comprises a plurality of first conductive-type transistors, the first conductive-type transistor arranged in the periphery is defined as a first transistor, the first conductive-type transistor arranged in an intermediate region is defined as a second transistor, the first transistor comprises a first channel region, and the second transistor comprises a second channel region, the length of the first channel region being less than the length of the second channel region.
Inventors:
ZHANG SHUHAO (CN)
LI NING (CN)
LI NING (CN)
Application Number:
PCT/CN2022/105650
Publication Date:
December 28, 2023
Filing Date:
July 14, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/105
Foreign References:
| CN113539328A | 2021-10-22 | |||
| CN102034825A | 2011-04-27 | |||
| JP2001284557A | 2001-10-12 | |||
| JPH02151066A | 1990-06-11 | |||
| US20160351709A1 | 2016-12-01 |
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
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