Title:
SCAN CIRCUIT, DISPLAY SUBSTRATE, AND DISPLAY APPARATUS
Document Type and Number:
WIPO Patent Application WO/2023/230835
Kind Code:
A1
Abstract:
A scan circuit having a plurality of stages is provided. A respective stage includes a respective scan unit configured to provide a control signal to at least a row of subpixels. The respective scan unit includes an input subcircuit (Isc) configured to receive a start signal (STV) or an output signal (G_(n-1)) from a previous scan unit, a first processing subcircuit (Psc1), a second processing subcircuit (Psc2), and an output subcircuit (Osc). The output subcircuit (Osc) includes a first output transistor (To1). The input subcircuit (Isc) includes a first input transistor (Ti1) and a second input transistor (Ti2) sequentially coupled between an input terminal (TMi) and a first node (N1). The first node (N1) is coupled to a gate electrode of the first output transistor (To1). The first processing subcircuit (Psc1) includes a first switch transistor (Ts1) and a second switch transistor (Ts2) coupled between the first node (N1) and a first reference terminal (TMr1). The first reference terminal (TMr1) is configured to receive a first reference signal (VREF1).
Inventors:
LU JIANGNAN (CN)
SHAN ZHENZHEN (CN)
ZHU JIANCHAO (CN)
SHANG GUANGLIANG (CN)
YAO XING (CN)
SHAN ZHENZHEN (CN)
ZHU JIANCHAO (CN)
SHANG GUANGLIANG (CN)
YAO XING (CN)
Application Number:
PCT/CN2022/096221
Publication Date:
December 07, 2023
Filing Date:
May 31, 2022
Export Citation:
Assignee:
BOE TECHNOLOGY GROUP CO LTD (CN)
International Classes:
G09G3/3266; G11C19/28
Foreign References:
CN109584799A | 2019-04-05 | |||
CN102779478A | 2012-11-14 | |||
CN107845403A | 2018-03-27 | |||
CN104464645A | 2015-03-25 | |||
CN102479476A | 2012-05-30 | |||
CN113113071A | 2021-07-13 | |||
JP2010164754A | 2010-07-29 |
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