Attorney Docket No.: 27170.950 (L0877PCT) PROTECTION OF POLYNOMIAL CRYPTOGRAPHIC OPERATIONS AGAINST SIDE-CHANNEL ATTACKS WITH CHANGE-OF-VARIABLE TRANSFORMATIONS TECHNICAL FIELD [0001] Aspects of the present disclosure are directed to cryptographic computing applications, more specifically to protection of cryptographic operations that use polynomial computations from side-channel attacks. BRIEF DESCRIPTION OF THE DRAWINGS [0002] The present disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various implementations of the disclosure. [0003] FIG.1 is a block diagram illustrating an example system architecture capable of protecting secret data against side channel attacks using one or more CoV transformations in polynomial cryptographic operations, in accordance with one or more aspects of the present disclosure. [0004] FIG.2 is an example illustration of a random CoV transformation of secret data in polynomial operations performed in the course of cryptographic computations, for improved protection against side-channel attacks, in accordance with one or more aspects of the present disclosure. [0005] FIG.3 depicts a flow diagram of an example method of protection of polynomial cryptographic operations against side channel attacks using one or more random CoV transformations, in accordance with one or more aspects of the present disclosure. [0006] FIG.4 depicts a flow diagram illustrating implementations of a CoV-protected joint operation performed as part of the example method of FIG.3, in accordance with one or more aspects of the present disclosure. [0007] FIG.5 depicts a block diagram of an example computer system 500 operating in accordance with one or more aspects of the present disclosure. DETAILED DESCRIPTION [0008] In public-key cryptography systems, a processing device may have various components/modules used for cryptographic operations on input messages. Input messages used in such operations are often large positive integers. Examples of cryptographic operations include, but are not limited to operations involving Rivest-Shamir-Adelman (RSA) Attorney Docket No.: 27170.950 (L0877PCT) and Elliptic Curve Diffie–Hellman (ECDH) keys, Digital Signature Algorithms (DSA), Elliptic Curve Digital Signature Algorithms (ECDSA), and the like. Cryptographic algorithms can involve modular arithmetic operations with a publicly-known modulus. Pre- quantum cryptographic applications often exploit the fact that factorizing the public modulus into privately-stored prime multipliers is a prohibitively difficult operation for a classical computer. [0009] Progress in development of quantum computers, however, has placed some of the conventional algorithms (RSA, DSA, ECDH, ECDSA) into jeopardy and motivated development of a number of post-quantum cryptographic algorithms, such as hash-based algorithms, code-based algorithms, multivariate algorithms, lattice-based algorithms, secret- key algorithms, symmetric key algorithms, and the like. Some of the post-quantum algorithms, e.g., the McEliece public key cryptosystem, use a representation of a ciphertext as a codeword with random errors. A private key allows to identify and remove errors from the codeword and to recover a plaintext encrypted in the codeword. Identifying errors may include finding roots of a large-degree polynomial (error-locator polynomial). Polynomials in McEliece cryptosystems, as well as other cryptosystems, are typically defined for a finite _{(Galois) field, ^^^^ ^^^^} ⁽ ₂ ^{^^^^ ^^^^)} _{, e.g.,} ^{∑ ^^^^−1} ^ _{^^^=0 ^^^^ ^^^^ ^^^^} ^{^^^^} _{, with the coefficients ^^^^ ^^^^ defined on a finite field} ^^^^ ^^^^(2 ^{^^^^} ) of characteristic 2 (e.g., with each coefficient ^^^^ _^^^^ represented by n bits), addition operations ^^^^ _^^^^ ^^^^ ^′ ^ _^^^ defined using bitwise XOR (modulo 2) additions, element-level multiplications ^^^^ _^^^^ ⋅ ^^^^ ^′ ^ _^^^ defined modulo a suitable irreducible polynomial of degree ^^^^, and _{polynomial-level multiplications defined modulo another suitable} irreducible polynomial of degree ^^^^ in variable ^^^^ with coefficients in ^^^^ ^^^^(2 ^{^^^^} ). It should be understood throughout this disclosure that characteristic 2 finite-field polynomial operations are used as illustration for conciseness and that operations in finite fields of any other characteristics (and/or infinite fields) may be protected with the techniques disclosed herein. [0010] Polynomials in cryptographic operations may be used to represent various secret and public data. For example, a polynomial ^^^^( ^^^^) may represent (or may be derived from) a public data (e.g., a ciphertext communicated over open communication channels) and another polynomial ^^^^( ^^^^) may represent (or may be derived from) a secret data (e.g., a private cryptographic key securely stored in a location that is not publicly accessible). Public polynomial ^^^^( ^^^^) and secret polynomial ^^^^( ^^^^) are often used together in a joint computational operation to generate another secret polynomial ^^^^( ^^^^) (or multiple secret polynomials). Secret polynomial ^^^^( ^^^^) may then be used to decode a plaintext message encoded in the ciphertext. Attorney Docket No.: 27170.950 (L0877PCT) For example, in McEliece cryptosystems, secret polynomial ^^^^( ^^^^) may be obtained by applying the greatest common divisor (GCD) algorithm (or half-GCD algorithm) to polynomials ^^^^( ^^^^) and ^^^^( ^^^^) and may be used to construct an error-locator polynomial whose roots indicate positions of errors introduced into an error correction code (ECC) during encoding of the plaintext into an ECC codeword. [0011] Cryptosystems that combine variable public data, e.g., polynomials ^^^^( ^^^^) with fixed secret data, e.g., polynomials ^^^^( ^^^^), may be vulnerable to side-channel attacks, if an attacker is able to generate large numbers of public polynomials ^^^^( ^^^^) and observe joint processing of such polynomials with a secret polynomial ^^^^( ^^^^). In particular, a side-channel attack may be performed by monitoring signals produced by electronic circuits of a targeted computer. Monitored signals may be acoustic, electric, magnetic, optical, thermal, and so on. By recording signals, a hardware trojan and/or a malicious software may correlate specific processor (and/or memory) activity with operations carried out by the processor. A simple power analysis (SPA) side-channel attack may involve examination of the electric power used by the device as a function of time. As the presence of noise hides the signal of the processor, a more sophisticated differential power analysis (DPA) attack may involve undertaking statistical analysis of power measurements performed over multiple cryptographic operations (or multiple iterations of a single cryptographic operation). An attacker employing DPA may filter out the noise component of the power signal (using the fact that the noise components may be uncorrelated between different operations or iterations) to extract the component of the signal that is representative of the actual processor operations, and to infer the value of the private key from this signal. During an attack (e.g., a template attack), an attacker accesses an attacker-controlled copy of the targeted computer and generates plaintext outputs for multiple ciphertext inputs (or ciphertext outputs for multiple plaintext inputs), in which known data (e.g., polynomials ^^^^( ^^^^)) is repeatedly combined with secret data (e.g., polynomials ^^^^( ^^^^)). [0012] Aspects and implementations of the present disclosure address these and other challenges of the existing technology by enabling systems and techniques of efficiently transforming secret polynomials for enhanced cryptographic protection of confidential data. In some implementations, prior to performing a joint operation on polynomials ^^^^( ^^^^) and ^^^^( ^^^^), the variable (indeterminate) ^^^^ may be transformed using an invertible change-of- variable (CoV) transformation, ^^^^ ^′ = ^^^^( ^^^^) resulting in a new representation for these polynomials. In some implementations, the randomizing transformation may be an affine Attorney Docket No.: 27170.950 (L0877PCT) linear transformation, ^^^^ ⁽ ^^^^ ⁾ = ^^^^ ^^^^ + ^^^^, where ^^^^ and ^^^^ may be random elements of the field in which the calculations take place, such that ^^^^ ≠ 0. The transformation may change the _{representation of polynomials ^^^^( ^^^^) and ^^^^( ^^^^) to transformed polynomials, ^^^^} ⁽ _^^^^ ⁾ _{→ ^^^^} ⁽ _^^^^ ^′) _{= ^^^^} ^� _^^^^ ⁽ _^^^^ ^)� _{≡ ^^^^( ^^^^) and ^^^^} ⁽ _^^^^ ⁾ _{→ ^^^^} ⁽ _^^^^ ^′) _{= ^^^^} ^� _^^^^ ⁽ _^^^^ ^)� _{≡ ^^^^( ^^^^). The joint operation may then be} performed using transformed polynomials ^^^^( ^^^^) and ^^^^( ^^^^). The resulting polynomial ^^^^( ^^^^) (e.g., intermediate output of a cryptographic operation) may be used to determine the inverse- _{transformed polynomial ^^^^} ⁽ _^^^^ ⁾ _{, using the inverse CoV transformation ^^^^} ⁻¹⁽ _^^^^ ⁾ _{, ^^^^} ⁽ _^^^^ ⁾ ₌ ^^^^( ^^^^ ⁻¹ ( ^^^^)). Such CoV transformation/inverse CoV transformation prevents an attacker from collecting statistics sufficient for determining the secret data. In some implementations, an error-localization procedure, e.g., identifying roots of the polynomial ^^^^ ⁽ ^^^^ ⁾ , may be executed using the transformed polynomial ^^^^( ^^^^) directly. The set of roots { ^^^^ _^^^^ } of a transformed error- locator polynomial Σ( ^^^^) (e.g., which may be obtained using the intermediate output ^^^^( ^^^^)) may be converted into roots of the target error-locator polynomial ^^^^ ⁽ ^^^^ ⁾ (or any other polynomial obtained based on ^^^^ ⁽ ^^^^ ⁾ , as may be specified by a particular cryptographic _{algorithm) using the CoV transformation:} ^{ _{^^^^ ^^^^} ^} _→ ^{ _{^^^ ^^^^^} ^} _{= { ^^^^( ^^^^ ^^^^)}. In some implementations,} prior to identifying roots of the error-locator polynomial Σ ⁽ ^^^^ ⁾ , an additional change of variables transformation, ^^^^′′ = ^^^^ ^′ ( ^^^^) may be applied. This replaces the intermediate output polynomial representation by ^^^^( ^^^^) → ^^^^′( ^^^^) = ^^^^( ^^^^( ^^^^′( ^^^^)). Correspondingly, the set of transformed roots { ^^^^′ _^^^^ } of the re-transformed polynomial Σ′( ^^^^) may be identified ^{and then converted into roots of the target error-locator polynomial ^^^^( ^^^^) as follows: { ^^^^′ ^^^^} →} _{{ ^^^ ^^^^^} = { ^^^^( ^^^^′( ^^^^′ ^^^^))}, which amounts to applying the combined CoV transformation ^^^^( ^^^^′} ⁽ _. ⁾ _{) to the roots of Σ′( ^^^^) .} [0013] Numerous additional implementations are disclosed herein. The advantages of the disclosed implementations include, but are not limited to, secure execution of cryptographic applications deploying polynomial operations by enabling enhanced protection of secret information against side-channel attacks and other unauthorized accesses. The disclosed implementations may be used in public key cryptography (e.g., McEliece cryptographic systems), symmetric key cryptography, digital signature algorithms, or any algorithms that use polynomial operations. [0014] FIG.1 is a block diagram illustrating an example system architecture 100 capable of protecting secret data against side channel attacks using one or more CoV transformations in polynomial cryptographic operations, in accordance with one or more aspects of the present disclosure. Example system architecture 100 may be a desktop computer, a tablet, a Attorney Docket No.: 27170.950 (L0877PCT) smartphone, a server (local or remote), a thin/lean client, and the like. Example system architecture 100 may be a smart card reader, a wireless sensor node, an embedded system dedicated to one or more specific applications (e.g., cryptographic applications 110-n), and so on. Example system architecture 100 may include (but need not be limited to) a computer system 102 having one or more processors 120 (e.g., central processing units (CPUs)) capable of executing binary instructions, and one or more memory devices 130. Herein “processor” or “processing device” refers to a device capable of executing instructions encoding arithmetic, logical, or I/O operations. In one illustrative example, a processing device may follow Von Neumann architectural model and may include an arithmetic logic unit (ALU), a control unit, and a plurality of registers. A processing device may be a single- core processor capable of executing one instruction at a time (or process a single pipeline of instructions), or a multi-core processor capable of simultaneous execution of multiple instructions. A processing device may be implemented as a single integrated circuit, two or more integrated circuits, or may be a component of a multi-chip module. A processing device may be or include a CPU, a graphics processing unit (GPU), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or any combination thereof. [0015] Example system architecture 100 may include an input/output (I/O) interface 104 to facilitate connection of computer system 102 to peripheral hardware devices 106 such as card readers, terminals, printers, scanners, internet-of-things devices, and the like. Example system architecture 100 may further include an internet interface 108 to facilitate connection to a variety of networks (Internet, wireless local area networks (WLAN), personal area networks (PAN), public networks, private networks, etc.), and may include a radio front end module and other devices (amplifiers, digital-to-analog and analog-to-digital converters, dedicated logic units, etc.) to implement data transfer to/from the computer system 102. Various hardware components of the computer system 102 may be connected via a bus 112, which may have its own logic circuits, e.g., a bus interface logic unit. [0016] Example computer system 102 may support one or more cryptographic applications 110-n, such as an embedded cryptographic application 110-1 and/or external cryptographic application 110-2. Cryptographic applications 110-n may be secure authentication applications, public key signature applications, key encapsulation applications, key decapsulation applications, encrypting applications, decrypting applications, secure storage applications, and so on. External cryptographic application 110-2 may be instantiated on the same computer system 102, e.g., by an operating system executed by the processor 120 and residing in a memory device 130. Alternatively, external cryptographic application Attorney Docket No.: 27170.950 (L0877PCT) 110-2 may be instantiated by a guest operating system supported by a virtual machine monitor (hypervisor) executed by the processor 120. In some implementations, external cryptographic application 110-2 may reside on a remote access client device or a remote server (not shown), with the computer system 102 providing cryptographic support for the client device and/or the remote server. [0017] Processor 120 may include one or more processor cores 122 having access to cache 124 (e.g., a single-level or multi-level cache) and one or more hardware registers 126. In some implementations, each processor core 122 may execute instructions to run a number of hardware threads, also known as logical processors. Various logical processors (or processor cores) may be assigned to one or more cryptographic applications 110-n, although more than one processor may be assigned to a single cryptographic application for parallel processing. Memory device 130 may refer to a volatile or non-volatile memory and may include a read-only memory (ROM) 132, a random-access memory (RAM) 134, as well as (not shown) electrically erasable programmable read-only memory (EEPROM), flash memory, flip-flop memory, or any other device capable of storing data. RAM 134 may be a dynamic random access memory (DRAM), synchronous DRAM (SDRAM), a static memory, such as static random access memory (SRAM), and the like. [0018] Memory device 130 may include one or more registers, such as one or more input registers 136 to store cryptographic keys, input polynomials, and other data for cryptographic applications 110-n. Memory device 130 may further include one or more output registers 138 to store outputs of cryptographic application, and one or more working registers 140 to store various intermediate values generated in the course of performing cryptographic computations, including CoV transformations and transformed polynomials. Memory device 130 may also include one or more control registers 142 for storing information about modes of operation, selecting a cryptographic algorithm, initializing cryptographic computations, selecting a masking mode, e.g., initial CoV transformation, subsequent (additional) CoV transformation, CoV re-transformation, and so on. Control registers 142 may communicate with one or more processor cores 122 and a clock 128, which may keep track of an iteration being performed. In some implementations, Registers 136–142 may be implemented as part of RAM 134. In some implementations, some or all of the registers 136–142 may be implemented separately from RAM 134. Some of or all registers 136–142 may be implemented as part of processor 120 (e.g., as part of the hardware registers 126). In some implementations, processor 120 and memory device 130 may be implemented as a single field-programmable gate array (FPGA). Attorney Docket No.: 27170.950 (L0877PCT) [0019] Computer system 102 may include a cryptographic engine 150 to support cryptographic operations of processor 120. Cryptographic engine 150 may be configured to perform side channel attack-resistant cryptographic operations, in accordance with implementations of the present disclosure. Cryptographic engine 150 may be a separate hardware component, e.g., as depicted in FIG.1. In some implementations, cryptographic engine 150 may be implemented as a software (or firmware) module instantiated in memory device 130. In some implementations, cryptographic engine 150 may be partially implemented as a hardware component and partially as a software (or firmware) module. Cryptographic engine 150 may include one or more cryptographic algorithm units 152 that performs cryptographic computations as may be specified by a particular cryptographic system. Cryptographic computations performed by cryptographic algorithm units 152 may include polynomial-based computations. Cryptographic engine 150 may include a CoV transformation/inverse CoV transformation unit 154 that protects operations of cryptographic algorithm units 152 against side-channel attacks by randomizing variables (indeterminates) and coefficients of various polynomials used in polynomial-based computations, e.g., as described in more detail in conjunction with FIG.2 below. Cryptographic engine 150 may further include a random number generator (RNG) 156 to generate various randomizing transformations, etc., as may be used by cryptographic algorithm units 152 and CoV transformation/inverse CoV transformation unit 154. [0020] FIG.2 is an example illustration of a CoV transformation 200 of secret data in polynomial operations performed in the course of cryptographic computations, for improved protection against side-channel attacks, in accordance with one or more aspects of the present disclosure. In some implementations, CoV transformation 200 may be performed by various components and/or modules of cryptographic engine 150 of FIG.1. In some implementations, CoV transformation 200 may be performed in the course of decryption of a ciphertext 202, which may be any message encrypted by a suitable cryptographic system, e.g., McEliece cryptographic system, RSA cryptographic system, Elliptic Curve cryptographic system, digital signature algorithms, lattice-based cryptographic systems (e.g., NTRUEncrypt and NTRUSign cryptosystems), Rijndael cryptographic system, Advanced Encryption Standard cryptographic system, and the like. Decryption of ciphertext 202 may involve using a secret key 204, which may be any cryptographic key permanently stored on computer system 102, ephemeral key or session key generated for a particular cryptographic episode, key generated to decrypt a particular message or a portion of a message, and the like. In some implementations, ciphertext 202 may have been obtained from a plaintext message Attorney Docket No.: 27170.950 (L0877PCT) by computing a multiplication product of a numerical representation (vector) of the plaintext message and a publicly available generating matrix and then corrupting the computed product by adding a vector of randomly generated errors. [0021] Ciphertext 202 may be used to generate a public polynomial ^^^^( ^^^^) 206, which in McEliece cryptosystems may be a syndrome polynomial that contains information about locations of the randomly generated errors. A secret polynomial ^^^^( ^^^^), e.g., a Goppa polynomial or any other suitable polynomial, may be obtained using secret key 204. Public polynomial ^^^^( ^^^^) 206 and secret polynomial ^^^^( ^^^^) 208 may be used to perform a joint operation 220. Joint operation 220 may be any operation whose output ^^^^( ^^^^) depends on both the public polynomial ^^^^( ^^^^) 206 and the secret polynomial ^^^^( ^^^^) 206. For example, joint operation 220 may include determining ^^^^( ^^^^) that is a GCD of public polynomial ^^^^( ^^^^) 206 and secret polynomial ^^^^( ^^^^) 208: ^ _^^^ ⁽ _^^^^ ⁾ _{⋅ ^^^^} ⁽ _^^^^ ⁾ _{+ ^^^^} ⁽ _^^^^ ⁾ _{⋅ ^^^^} ⁽ _^^^^ ⁾ _{= ^^^^} ⁽ _^^^^ ⁾ _{, with some polynomials ^^^^} ⁽ _^^^^ ⁾ _{and ^^^^} ⁽ _^^^^ ⁾ _{that may be computed in the course of execution of} the GCD algorithm. Determining the GCD polynomial ^^^^( ^^^^) may be performed, e.g., using the Extended Euclidean Algorithm. In some implementations, e.g., in McEliece cryptosystems, joint operation 220 may include performing an extended half-GCD algorithm. This amounts to finding determining ^^^^( ^^^^) for the public polynomial ^^^^( ^^^^) 206 and the secret polynomial ^^^^( ^^^^) 208, such that ^ _^^^ ⁽ _^^^^ ⁾ _{⋅ ^^^^} ⁽ _^^^^ ⁾ _{+ ^^^^} ⁽ _^^^^ ⁾ _{⋅ ^^^^} ⁽ _^^^^ ⁾ _{= ^^^^} ⁽ _^^^^ ⁾ _, where the degree of secret polynomial ^^^^( ^^^^) 208 is ^^^^, the degree of polynomial ^^^^ ⁽ ^^^^ ⁾ is less _{than or equal to} ^⌊ _^^^^/2 ^⌋ _{, and the degree of polynomial ^^^^( ^^^^) is less than or equal to} ^⌊ _{( ^^^^ − 1)/2} ^⌋ _. (For example, the extended half-GCD algorithm may be performed using full GCD iterations _{that are stopped once the two conditions on the polynomials ^^^^} ⁽ _^^^^ ⁾ _{and ^^^^} ⁽ _^^^^ ⁾ _{is satisfied.) In} some implementations, the GCD polynomial reduces to unity, ^^^^ ⁽ ^^^^ ⁾ = 1, and the extended _{GCD algorithm amounts to computing an inverse of ^^^^} ⁽ _^^^^ ⁾ _{modulo ^^^^} ⁽ _^^^^ ⁾ _{(e.g., to obtain ^^^^} ⁽ _^^^^ ⁾ ₎ or an inverse of ^^^^( ^^^^) modulo ^^^^( ^^^^) (e.g., to obtain ^^^^( ^^^^)). The polynomial ^^^^( ^^^^) represents an intermediate output of the decryption operation and may be used for final processing 250, which computes the final output, e.g., plaintext 270. For example, intermediate output ^^^^ ⁽ ^^^^ ⁾ _{may be used to construct an error-locator polynomial, e.g., ^^^^} ⁽ _^^^^ ⁾ _{= [ ^^^^} ⁽ _^^^^ ⁾ _] ² _{+ ^^^^ ⋅ [ ^^^^} ⁽ _^^^^ ⁾ _] ² _{, or} any other suitable polynomial as may be specified by a cryptographic algorithm. The locator Attorney Docket No.: 27170.950 (L0877PCT) polynomial ^^^^ ⁽ ^^^^ ⁾ may be used to identify locations of errors introduced during encryption e.g., as part of final processing 250. [0022] To protect joint operation 220, CoV transformation 210 may be applied to public polynomial ^^^^( ^^^^) 206 and secret polynomial ^^^^( ^^^^) 208. CoV transformation 210 refers to a random invertible transformation of the indeterminate ^^^^ of the polynomial. Change of variables transformation 210 may include applying an invertible transformation, ^^^^ ^′ = ^^^^( ^^^^). In some implementations, the CoV transformation may be an affine linear transformation, ^^^^ ⁽ ^^^^ ⁾ = ^^^^ ^^^^ + ^^^^, where ^^^^ and ^^^^ may be elements in a field on which the polynomials are defined, e.g., ^^^^ ^^^^(2 ^{^^^^} ), a field of characteristic other than 2, or any other suitable field. In some implementations, one or both of ^^^^ and/or ^^^^ may be random elements (with ^^^^ ≠ 0 ) in ^^^^ ^^^^(2 ^{^^^^} ), e.g., generated by RNG 156 depicted in FIG.1. The CoV transformation may amount to a change of the representation of polynomials ^^^^( ^^^^) and ^^^^( ^^^^) to transformed polynomials, ^^^^( ^^^^) and ^^^^( ^^^^), ^ _{^^^ .} In the instances of affine linear CoV transformations, CoV does not change the degree of the polynomials. _{[0023] It should be understood that polynomials, e.g., ^^^^} ⁽ _^^^^ ⁾ ₌ ^{∑ ^^^^−1} ^ _{^^^=0 ^^^^ ^^^^ ^^^^} ^{^^^^} _{, in the variable} (indeterminate) ^^^^ are be considered as an abstraction-level representation of various computational operations, and that the variable ^^^^ itself need not be stored or referenced by memory device 130 and/or cryptographic engine 150. In particular, polynomial ^^^^ ⁽ ^^^^ ⁾ (as well as other encountered or computed polynomials) may be stored (and operated on) as ^^^^ data units (symbols, words, etc.) ^^^^ _^^^^ (or as ^^^^ + 1 data units, if the degree ^^^^ of the polynomial is less than ^^^^− 1), each data unit ^^^^ _^^^^ having ^^^^ bits. For example, each ^^^^ _^^^^ may be one-byte data units corresponding to elements in ^^^^ ^^^^(2 ⁸ ). This polynomial abstraction may be understood as specifying the same computational operations (e.g., additions, multiplications, etc.) performed on the data units ^^^^ _^^^^ as would have resulted from _{performed on the respective coefficients ^^^^ ^^^^ of the polynomial ^^^^} ⁽ _{= ^^^^=0 ^^^^} ^{^^^^} _{. Similarly,} operations of a CoV transformation may be understood as being performed on the data units in the same way as would have resulted from the corresponding transformation operations Attorney Docket No.: 27170.950 (L0877PCT) performed upon transforming the variable ^^^^ of the polynomial ^^^^ ⁽ ^^^^ ⁾ . For example, for a third- degree polynomial ^^^^( ^^^^) = ^^^^ ₃ ^^^^ ³ + ^^^^ ₂ ^^^^ ² + ^^^^ ₁ ^^^^ + ^^^^ ₀ , an affine linear randomizing transformation for the variable ^^^^ → ^^^^ ^′ = ^^^^ ^^^^ + ^^^^ may be understood as the following transformation for the coefficients, ^^^^ _^^^^ → ^^^^ _^^^^ : ^^^^ ₀ → ^^^^ ₀ = ^^^^ ₃ ⋅ ^^^^ ³ + ^^^^ ₂ ⋅ ^^^^ ² + ^^^^ ₁ ⋅ ^^^^ + ^^^^ ₀ , ^ _{^^^1 → ^^^^1 =} ⁽ _{^^^^3 ⋅ ^^^^} ² _{+ ^^^^1} ⁾ _{⋅ ^^^^,} ^^^^ ₂ → ^^^^ ₂ = ( ^^^^ ₃ ⋅ ^^^^ + ^^^^ ₂ ) ⋅ ^^^^ ² , ^^^^ ₃ → ^^^^ ₃ = ^^^^ ₃ ⋅ ^^^^ ³ , as would have resulted from the CoV transformation ^^^^ → ^^^^ ^′ of the respective polynomial, _^^^^ ^{^^^^−1 ^^^^ ^^^^−1 ^^^^ ^^^^−1 ^^^^ ^^^^−1 ^^^^} _. [0024] Joint operation 220 may be performed based on the transformed polynomials ^^^^( ^^^^) and ^^^^( ^^^^). Joint operation 220 may be performed using substantially the same computations as described above for the inverse-transformed polynomials ^^^^( ^^^^) and ^^^^( ^^^^). For example, in McEliece cryptosystems, where joint operation 220 may execute the half-GCD algorithm, _{joint operation 220 may compute such polynomials ^^^^} ⁽ _^^^^ ⁾ _{and ^^^^} ⁽ _^^^^ ⁾ _{, that: ^^^^} ⁽ _^^^^ ⁾ _{⋅ ^^^^} ⁽ _^^^^ ⁾ _{+ ^^^^} ⁽ _^^^^ ⁾ _{⋅ ^^^^} ⁽ _^^^^ ⁾ _{= ^^^^} ⁽ _^^^^ ⁾ _, and where the degree of masked secret polynomial ^^^^( ^^^^) is ^^^^, the degree of intermediate _{output polynomial ^^^^} ⁽ _^^^^ ⁾ _{is less than or equal to} ^⌊ _^^^^/2 ^⌋ _{, and the degree of polynomial ^^^^( ^^^^) is less than or equal to} ^⌊ _{( ^^^^ − 1)/2} ^⌋ _. [0025] Intermediate transformed output polynomial ^^^^( ^^^^) 230 (and other intermediate _{outputs, e.g., polynomials ^^^^} ⁽ _^^^^ ⁾ _{, ^^^^} ⁽ _^^^^ ⁾ _{, etc.) may undergo inverse transformation 240, e.g.,} inverse CoV transformation, ^^^^( ^^^^) = ^^^^� ^^^^ ⁻¹ ( ^^^^)�, In some implementations, the CoV transformation may be an affine linear transformation, ^^^^ ⁽ ^^^^ ⁾ = ^^^^ ^^^^ + ^^^^, where ^^^^ and ^^^^ may be elements in any suitable field, e.g., ^^^^ ^^^^(2 ^{^^^^} ) or any other field over which the polynomials are defined. For example, ^^^^ and ^^^^ may be random _{elements (with ^^^^ ≠ 0 ), generated by RNG 156. e.g., ^^^^} ⁻¹⁽ _^^^^ ⁾ _{= ^^^^} ⁻¹ _⋅ ⁽ _{^^^^ − ^^^^} ⁾ _{, in the} instances of linear CoV. Similar inverse transformations may be performed for other _{intermediate polynomials ^^^^} ⁽ _^^^^ ⁾ _{, ^^^^} ⁽ _^^^^ ⁾ _{, and so on. In some implementations, final processing} Attorney Docket No.: 27170.950 (L0877PCT) ^{250 of intermediate output(s) may be performed on original polynomials, e.g., ^^^^( ^^^^) =} _{[ ^^^^( ^^^^)]2 + ^^^^ ⋅ [ ^^^^( ^^^^)]2. In some implementations, final processing 250 may be performed on} transformed polynomials. For example, during final processing 250, roots of transformed ^{locator polynomial Σ( ^^^^) = [ ^^^^( ^^^^)]2 + ^^^^( ^^^^) ⋅ [ ^^^^( ^^^^)]2 may be identified. The identified roots} _{{ ^^^^ ^^^^} of the polynomial Σ( ^^^^) (or any other polynomial obtained based on ^^^^( ^^^^), as may be} specified by a particular cryptographic algorithm) may be converted into roots { ^^^ _^ ^ _^^^ } of the ^{(original) locator polynomial ^^^^( ^^^^) using the same CoV transformation: ^^^^ ^^^^} → { ^^^ ^^^^^} =} _{{ ^^^^ ^^^^ as part of final inverse transformation 260. Search for { ^^^ ^^^^^} (if the} is performed prior to identification of the roots) or roots ^{ ^^^^ _^^^^ ^} (if the inverse transformation is performed after identification of the roots) may be performed using any suitable root-finding algorithm, e.g., direct search, additive Fast Fourier Transform techniques, Chien search, and so on. [0026] In some implementations, prior to performing final processing 250, e.g., prior to identifying roots of the locator polynomial (or performing any other polynomial operation, as may be specified by a particular deployed cryptographic algorithm), additional CoV transformation 242 may be performed. Additional CoV transformation 242 may be performed after intermediate inverse transformation 240 or instead of intermediate inverse transformation 240. More specifically, additional CoV transformation 242 may include performing a second invertible CoV transformation, ^^^^ ^′′ = ^^^^′( ^^^^), which may be another affine linear transformation, ^^^^′( ^^^^) = ^^^^′ ^^^^ + ^^^^′. In some implementations, ^^^^′ and ^^^^′ may random be elements in ^^^^ ^^^^(2 ^{^^^^} ) or any other field over which the polynomial computations are defined, generated by RNG 156 illustrated in FIG.1. Additional CoV transformation 242 _{replaces intermediate output polynomial representations ^^^^} ⁽ _^^^^ ⁾ _{→ ^^^^} ^′( _^^^^ ⁾ _{= ^^^^( ^^^^′} ⁽ _^^^^ ⁾ _{), ^^^^} ⁽ _^^^^ ⁾ _→ ^^^^ ^′ ( ^^^^) = ^^^^( ^^^^′( ^^^^)), and similarly for other intermediate output polynomial representations. The additionally transformed (re-transformed) intermediate output polynomial representations may then be used for final processing 250, as described above. [0027] For example, a set of transformed roots { ^^^^′ _^^^^ } of the locator polynomial Σ( ^^^^′ ⁽ ^^^^ ⁾ ) in a second representation may be identified as part of final processing 250. The set of transformed roots { ^^^^′ _^^^^ } may then be converted, e.g., as part of final inverse transformation _{260, into roots} ^{ _{^^^ ^^^^^} ^} _{of the target locator polynomial ^^^^} ⁽ _^^^^ ⁾ _{in the original representation as} ^follows: { _{^^^^′ ^^^^} → { ^^^ ^^^^^} = { ^^^^( ^^^^′( ^^^^′ ^^^^))},} Attorney Docket No.: 27170.950 (L0877PCT) which amounts to applying the combined CoV transformation ^^^^( ^^^^′ ⁽ . ⁾ ) to the roots of the transformed error-locator polynomial. For example, in the two linear transformations ^^^^(. ) and ^^^^ ^′ (. ), the roots of the error-locator polynomial may be obtained by the combined transformation, ^^^ _^ ^ _^^^ = ( ^^^^ ⋅ ^^^^ ^′ ) ^^^^′ _^^^^ + ^^^^ ⋅ ^^^^′ + ^^^^, Plaintext 270 may then be obtained using the roots of the error-locator polynomial, e.g., by removing the errors with known locations from the codeword. [0028] FIG.3 depicts a flow diagram of an example method 300 of protection of polynomial cryptographic operations against side channel attacks using one or more random CoV transformations, in accordance with one or more aspects of the present disclosure. Method 300 disclosed below, and/or each of its individual functions, routines, subroutines, or operations may be performed by one or more processing units of the computing system implementing the respective methods, e.g., processor 120 of computer system 102. In some implementations, method 300 may be performed by an arithmetic logic unit, an FPGA, an ASIC, a cryptographic accelerator, a dedicated hardware circuit, and the like, or any suitable processing logic, hardware or software or a combination thereof. In certain implementations, method 300 may be performed by a single processing thread. Alternatively, method 300 may be performed by two or more processing threads, each thread executing one or more individual functions, routines, subroutines, or operations of the method. In an illustrative example, the processing threads implementing method 300 may be synchronized (e.g., using semaphores, critical sections, and/or other thread synchronization mechanisms). Alternatively, the processing threads implementing method 300 may be executed asynchronously with respect to each other. Various operations of method 300 may be performed in a different order compared with the order shown in FIG.3 (and/or order shown in FIG.4). Some blocks may be performed concurrently with other blocks. Some blocks of method 300 may be optional. [0029] Method 300 may be performed by one or more processing units of computer system 102, e.g., processor 120. In some implementations, a cryptographic operation protected by method 300 may include decrypting a ciphertext input and recovering a plaintext output encrypted in the ciphertext input. In some implementations, the cryptographic operation may be performed as part of McEliece public key encryption/decryption cryptography, e.g., a McEliece decryption operation, or performed as part of any public key Attorney Docket No.: 27170.950 (L0877PCT) or symmetric cryptography. At block 310, method 300 may include identifying, by a processing device, a first polynomial (e.g., public polynomial ^^^^( ^^^^) 206 in FIG.1) in a first representation. In some implementations, the first polynomial may be obtained using an input into the cryptographic operation, which may be a ciphertext. In some implementations, the first polynomial and/or the second polynomial may be a polynomial in a ^^^^ ^^^^ (2 ^{^^^^} ) field, where ^^^^ = 128, 256, 1024 , or some other integer number. Coefficients of the first polynomial and/or the second polynomial may be elements of a ^^^^ ^^^^(2 ^{^^^^} ) field, where ^^^^ = 2, 4, 8, 16, or some other integer number. In some implementations, coefficients of the first polynomial may be elements of any other finite field or an infinite field. At block 320, method 300 may include identifying a second polynomial (e.g., secret polynomial ^^^^( ^^^^) 208 in FIG.1) in the first representation. In some implementations, the second polynomial may be obtained using a cryptographic key for the cryptographic operation. [0030] At block 330, method 300 may continue with the processing device applying a CoV transformation from the first variable to a second variable (e.g., ^^^^ → ^^^^ ^′ = ^^^^( ^^^^)) to the first polynomial to obtain the first polynomial in a second representation. As described in more detail above, applying the CoV transformation may amount to a change of the coefficients (data units) of the first polynomial ^^^^ _^^^^ → ^^^^ _^^^^ as specified by the CoV transformation, ^^^^( ^^^^) → ^^^^( ^^^^ ^′ ) = ^^^^� ^^^^( ^^^^)� ≡ ^^^^( ^^^^). The processing device may further apply the CoV transformation (from the first variable to the second variable) to the second polynomial ^^^^( ^^^^) → ^^^^( ^^^^ ^′ ) = ^^^^� ^^^^( ^^^^)� ≡ ^^^^( ^^^^) to obtain the second polynomial in the second representation. In some implementations, the CoV transformation may be an invertible transformation from the first variable to the second variable. In some implementations, the invertible transformation may be an affine linear transformation from the first variable to the second variable (e.g., ^^^^( ^^^^) = ^^^^ ^^^^ + ^^^^). [0031] At block 340, method 300 may continue with the processing device performing a joint operation using the first polynomial in the second representation (e.g., ^^^^ ⁽ ^^^^ ⁾ ) and the second polynomial in the second representation (e.g., ^^^^ ⁽ ^^^^ ⁾ ). The joint operation may be any suitable operation whose output depends on the value of the first polynomial and the second polynomial. In some implementations, performing the joint operation may include executing the extended GCD algorithm for the transformed first polynomial and the transformed second polynomial. In some implementations, performing the joint operation may include executing the extended half-GCD algorithm for the first polynomial in the second representation and the second polynomial in the second representation. In some implementations, performing the Attorney Docket No.: 27170.950 (L0877PCT) joint operation may include executing an algorithm computing an inverse of one of (i) the first polynomial in the second representation or (ii) the second polynomial in the second representation modulo another one of (i) the first polynomial in the second representation or (ii) the second polynomial in the second representation. [0032] At block 350, method 300 may include computing, by the processing device, an output of the cryptographic operation using the output of the joint operation (e.g., polynomial _^^^^ ⁽ _^^^^ ⁾ _{, polynomial Σ} ⁽ _^^^^ ⁾ _{, and so on). In some implementations, computing the output of the} cryptographic operation may include performing operations illustrated in the callout portion of FIG.3. More specifically, at block 352, the processing device performing method 300 may inverse-transform the output of the joint operation using an inverse of the CoV transformation _{(e.g., ^^^^} ⁽ _^^^^ ⁾ _{→ ^^^^} ⁽ _^^^^ ⁾ _{At block 354, method 300 may include} computing the output of the cryptographic operation using the inverse-transformed output of the joint operation. [0033] FIG.4 depicts a flow diagram illustrating implementations of a CoV-protected joint operation performed as part of example method 300 of FIG.3, in accordance with one or more aspects of the present disclosure. In some implementations, operations of block 340 of method 300 may include, at block 341, obtaining a transformed error-locator polynomial (ELP) (e.g., polynomial Σ ⁽ ^^^^ ⁾ ) using the transformed first polynomial and the transformed second polynomial. In one example (left branch in FIG.4), method 300 may include, at block 342, identifying a first set of roots of the transformed ELP (e.g., { ^^^^ _^^^^ }). The first set of roots may be associated with the polynomial in its second representation. At block 343, method 300 may include using the CoV transformation to identify, from the first set of roots of the ELP in the second representation, a second set of roots of an original ELP in the first _{representation (e.g.,} ^{ _{^^^^ ^^^^} ^} _→ ^{ _{^^^ ^^^^^} ^} _{= { ^^^^( ^^^^ ^^^^)}). The second set of roots (e.g.,} ^{ _{^^^ ^^^^^} ^} _{) may be} associated with the polynomial in the first representation (e.g., ^{ ^^^ _^ ^ _^^^ ^} may be the roots of the _{original ELP ^^^^} ⁽ _^^^^ ⁾ _). [0034] In another example (right branch in FIG.4), method 300 may include, at block 344, applying an additional CoV transformation (e.g., ^^^^ ^′′ = ^^^^′( ^^^^)) from the first variable to a third variable to obtain the ELP (e.g., ^^^^′( ^^^^)) in a third representation. The ELP in the third representation may be related to the ^^^^ the first representation via a _{combined transformation (e.g., ^^^^} ^′( _^^^^ ⁾ _{= ^^^^( ^^^^′} ⁽ _^^^^ ⁾ _{, in one example). At block 345,} method 300 may continue with identifying a first set of roots of the re-transformed ELP (e.g., set { ^^^^ ^′ ^ _^^^ }) in a third representation, and at block 346 may include using the combined Attorney Docket No.: 27170.950 (L0877PCT) transformation to identify, from the first set of roots of the re-transformed ELP, a second set ^{of roots of an original ELP (e.g., { ^^^^′ ^^^^}→ { ^^^ ^^^^^} = { ^^^^( ^^^^′( ^^^^′ ^^^^))}). The second set of roots (e.g.,} _{{ ^^^ ^^^^^}) may be associated with the ELP polynomial in its original (first) representation , and the} combined transformation may be based on the CoV transformation (e.g., ^^^^ ⁽ . ⁾ ) and the _{additional CoV transformation (e.g., ^^^^′} ⁽ _. ⁾ _). [0035] FIG.5 depicts a block diagram of an example computer system 500 operating in accordance with one or more aspects of the present disclosure. In various illustrative examples, computer system 500 may represent computer system 102, illustrated in FIG.1. Example computer system 500 may be connected to other computer systems in a LAN, an intranet, an extranet, and/or the Internet. Computer system 500 may operate in the capacity of a server in a client-server network environment. Computer system 500 may be a personal computer (PC), a set-top box (STB), a server, a network router, switch or bridge, or any device capable of executing a set of instructions (sequential or otherwise) that specify actions to be taken by that device. Further, while only a single example computer system is illustrated, the term “computer” shall also be taken to include any collection of computers that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methods discussed herein. [0036] Example computer system 500 may include a processing device 502 (also referred to as a processor or CPU), which may include processing logic 526, a main memory 504 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM), etc.), a static memory 506 (e.g., flash memory, static random access memory (SRAM), etc.), and a secondary memory (e.g., a data storage device 518), which may communicate with each other via a bus 530. [0037] Processing device 502 represents one or more general-purpose processing devices such as a microprocessor, central processing unit, or the like. More particularly, processing device 502 may be a complex instruction set computing (CISC) microprocessor, reduced instruction set computing (RISC) microprocessor, very long instruction word (VLIW) microprocessor, processor implementing other instruction sets, or processors implementing a combination of instruction sets. Processing device 502 may also be one or more special- purpose processing devices such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), network processor, or the like. In accordance with one or more aspects of the present disclosure, processing device 502 Attorney Docket No.: 27170.950 (L0877PCT) may be configured to execute instructions implementing method 300 of protection of polynomial cryptographic operations against side channel attacks using CoV transformations. [0038] Example computer system 500 may further comprise a network interface device 508, which may be communicatively coupled to a network 520. Example computer system 500 may further comprise a video display 510 (e.g., a liquid crystal display (LCD), a touch screen, or a cathode ray tube (CRT)), an alphanumeric input device 512 (e.g., a keyboard), a cursor control device 514 (e.g., a mouse), and an acoustic signal generation device 516 (e.g., a speaker). [0039] Data storage device 518 may include a computer-readable storage medium (or, more specifically, a non-transitory computer-readable storage medium) 528 on which is stored one or more sets of executable instructions 522. In accordance with one or more aspects of the present disclosure, executable instructions 522 may comprise executable instructions implementing method 300 of protection of polynomial cryptographic operations against side channel attacks using CoV transformations. [0040] Executable instructions 522 may also reside, completely or at least partially, within main memory 504 and/or within processing device 502 during execution thereof by example computer system 500, main memory 504 and processing device 502 also constituting computer-readable storage media. Executable instructions 522 may further be transmitted or received over a network via network interface device 508. [0041] While the computer-readable storage medium 528 is shown in FIG.5 as a single medium, the term “computer-readable storage medium” should be taken to include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) that store the one or more sets of operating instructions. The term “computer-readable storage medium” shall also be taken to include any medium that is capable of storing or encoding a set of instructions for execution by the machine that cause the machine to perform any one or more of the methods described herein. The term “computer-readable storage medium” shall accordingly be taken to include, but not be limited to, solid-state memories, and optical and magnetic media. [0042] Some portions of the detailed descriptions above are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of steps leading to a desired result. The steps are those requiring physical Attorney Docket No.: 27170.950 (L0877PCT) manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like. [0043] It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise, as apparent from the following discussion, it is appreciated that throughout the description, discussions utilizing terms such as “identifying,” “determining,” “storing,” “adjusting,” “causing,” “returning,” “comparing,” “creating,” “stopping,” “loading,” “copying,” “throwing,” “replacing,” “performing,” or the like, refer to the action and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices. [0044] Examples of the present disclosure also relate to an apparatus for performing the methods described herein. This apparatus may be specially constructed for the required purposes, or it may be a general purpose computer system selectively programmed by a computer program stored in the computer system. Such a computer program may be stored in a computer readable storage medium, such as, but not limited to, any type of disk including optical disks, CD-ROMs, and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), EPROMs, EEPROMs, magnetic disk storage media, optical storage media, flash memory devices, other type of machine-accessible storage media, or any type of media suitable for storing electronic instructions, each coupled to a computer system bus. [0045] The methods and displays presented herein are not inherently related to any particular computer or other apparatus. Various general purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct a more specialized apparatus to perform the required method steps. The required structure for a variety of these systems will appear as set forth in the description below. In addition, the scope of the present disclosure is not limited to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the present disclosure. Attorney Docket No.: 27170.950 (L0877PCT) [0046] It is to be understood that the above description is intended to be illustrative, and not restrictive. Many other implementation examples will be apparent to those of skill in the art upon reading and understanding the above description. Although the present disclosure describes specific examples, it will be recognized that the systems and methods of the present disclosure are not limited to the examples described herein, but may be practiced with modifications within the scope of the appended claims. Accordingly, the specification and drawings are to be regarded in an illustrative sense rather than a restrictive sense. The scope of the present disclosure should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.