Title:
PROCESSOR AND CONTROL SYSTEM COMPRISING SAME
Document Type and Number:
WIPO Patent Application WO/2024/075556
Kind Code:
A1
Abstract:
A notification CPU (144) is provided with a first memory (210), a first core (220), and a second core (230). The first core (220) executes: a process of reading setting parameters corresponding to a prescribed communication standard from a second memory (148) that stores prescribed calculation processing and setting parameters corresponding to prescribed communication standards, and storing the same in the first memory (210); a process of reading input information from the first memory (210); and a process of writing information obtained by the calculation processing to the first memory (210) as output information. The second core (230) executes a reading process of reading the setting parameters from the first memory (210), a process of carrying out external communication in which the setting parameters read in the reading process are used, a process of writing information received in the communication process to the first memory (210) as input information, and a process of reading output information from the first memory (210) for transmission in the communication process.
Inventors:
KINUGASA YASUHIRO
AIMI KEI
AIMI KEI
Application Number:
PCT/JP2023/034620
Publication Date:
April 11, 2024
Filing Date:
September 25, 2023
Export Citation:
Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
G05B19/05; G06F8/65
Attorney, Agent or Firm:
KAMATA Kenji et al. (JP)
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