Title:
PHASE-LOCKED LOOP, SIGNAL PROCESSING DEVICE AND SIGNAL PROCESSING METHOD
Document Type and Number:
WIPO Patent Application WO/2023/236398
Kind Code:
A1
Abstract:
A phase-locked loop, a signal processing device and a signal processing method. In the phase-locked loop, a reference clock unit outputs two or more frequency-adjustable synchronous reference clock signals to a phase discrimination unit; a feedback unit performs frequency division processing on an output voltage signal, which is output by the phase-locked loop within a first period, so as to obtain a feedback signal; the phase discrimination unit determines a corresponding error signal for each reference clock signal according to the phase difference between each reference clock signal and the feedback signal; a weighting unit performs weighting calculation on the determined error signals, so as to obtain a weighted error signal; and a correction unit is configured to correct, according to the weighted error signal, an output voltage signal, which is output by the phase-locked loop within a second period.
Inventors:
DENG WEI (CN)
LIU HONGZHUO (CN)
JIA HAIKUN (CN)
CHI BAOYONG (CN)
LIU HONGZHUO (CN)
JIA HAIKUN (CN)
CHI BAOYONG (CN)
Application Number:
PCT/CN2022/123554
Publication Date:
December 14, 2023
Filing Date:
September 30, 2022
Export Citation:
Assignee:
UNIV TSINGHUA (CN)
International Classes:
H03L7/085; H03L7/08; H03L7/087
Foreign References:
| CN115037294A | 2022-09-09 | |||
| CN111953345A | 2020-11-17 | |||
| CN111277262A | 2020-06-12 | |||
| CN103959653A | 2014-07-30 | |||
| CN202949409U | 2013-05-22 | |||
| US20090015338A1 | 2009-01-15 |
Attorney, Agent or Firm:
AFD CHINA INTELLECTUAL PROPERTY LAW OFFICE (CN)
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