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Patent Searching and Data


Title:
LOGIC ANALYSIS DECODING METHOD AND APPARATUS
Document Type and Number:
WIPO Patent Application WO/2023/236245
Kind Code:
A1
Abstract:
The present disclosure provides a logic analysis decoding method, comprising the following steps: acquiring a sampling file of a memory circuit block, and generating an instruction sequence file of the memory circuit block, the sampling file comprising multiple sampling results, each sampling result comprising a sampling point and a pin state of the memory circuit block corresponding to the sampling point, and the instruction sequence file comprising multiple test instructions applied to the memory circuit block; aligning the multiple test instructions with the multiple sampling results; determining, according to the aligned multiple test instructions and multiple sampling results, whether the memory circuit block triggers frequency conversion; if so, calculating a switched clock frequency of the memory circuit block according to the multiple sampling results; aligning the multiple test instructions and the multiple sampling results according to the switched clock frequency. In this way, logic analysis decoding of the memory circuit block in a variable frequency environment is achieved.

Inventors:
WANG PENG (CN)
Application Number:
PCT/CN2022/099838
Publication Date:
December 14, 2023
Filing Date:
June 20, 2022
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G11C29/18
Foreign References:
CN110928826A2020-03-27
CN114441934A2022-05-06
CN114578212A2022-06-03
US20140354264A12014-12-04
CN112634801A2021-04-09
Attorney, Agent or Firm:
SHANGHAI WINSUN INTELLECTUAL PROPERTY AGENCY (CN)
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