Title:
LAYOUT DESIGN METHOD, INTEGRATED CIRCUIT, OPERATION CHIP, AND COMPUTING DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/110787
Kind Code:
A1
Abstract:
The present invention relates to a layout design method, an integrated circuit, an operation chip, and a computing device. The layout design method comprises generating a primary layout on the basis of a circuit diagram netlist by using a primary standard cell library, the circuit diagram netlist comprising a first standard cell and a second standard cell, and the primary standard cell library comprising a first standard layout of the first standard cell and a second standard layout of the second standard cell. The method further comprises combining the first standard layout and the second standard layout on the basis of a splicing relationship of the first standard layout and the second standard layout in the primary layout so as to optimize a combined layout.
Inventors:
KONG WEIXIN (CN)
YU DONG (CN)
FAN ZHIJUN (CN)
TIAN WENBO (CN)
YU DONG (CN)
FAN ZHIJUN (CN)
TIAN WENBO (CN)
Application Number:
PCT/CN2021/101930
Publication Date:
June 02, 2022
Filing Date:
June 24, 2021
Export Citation:
Assignee:
SHENZHEN MICROBT ELECTRONICS TECH CO LTD (CN)
International Classes:
G06F30/398; G06F30/392
Foreign References:
| CN112507648A | 2021-03-16 | |||
| CN111241772A | 2020-06-05 | |||
| CN111898334A | 2020-11-06 | |||
| CN111241769A | 2020-06-05 | |||
| CN111488717A | 2020-08-04 |
Attorney, Agent or Firm:
CCPIT PATENT AND TRADEMARK LAW OFFICE (CN)
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