Title:
GATE DRIVING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2024/063427
Kind Code:
A1
Abstract:
Each of a plurality of stages of a gate driving circuit according to an embodiment of the present invention comprise: a first node control part that controls the voltage levels of a first node and a second node; a second node control part that controls the voltage level of a third node; and a first output part that outputs a first voltage or a second voltage as a gate signal according to the voltage levels of the second node and the third node, wherein the first node control part may be provided with a single gate transistor comprising one gate and a dual gate transistor comprising a pair of gates disposed on different layers with a semiconductor interposed therebetween.
Inventors:
BYUN MIN WOO (KR)
AN JUN YONG (KR)
KWON SOON GI (KR)
MIN JUN YOUNG (KR)
CHOI JUN WON (KR)
HYUN CHAE HAN (KR)
AN JUN YONG (KR)
KWON SOON GI (KR)
MIN JUN YOUNG (KR)
CHOI JUN WON (KR)
HYUN CHAE HAN (KR)
Application Number:
PCT/KR2023/013673
Publication Date:
March 28, 2024
Filing Date:
September 12, 2023
Export Citation:
Assignee:
SAMSUNG DISPLAY CO LTD (KR)
International Classes:
G09G3/3266; G09G3/20
Foreign References:
| KR20210152085A | 2021-12-15 | |||
| KR20200049677A | 2020-05-08 | |||
| KR20210143979A | 2021-11-30 | |||
| US5359244A | 1994-10-25 | |||
| KR102287194B1 | 2021-08-09 |
Attorney, Agent or Firm:
Y.P. LEE, MOCK & PARTNERS (KR)
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