Title:
FAN-OUT PACKAGING STRUCTURE HAVING INTER-CHIP FINE INTERCONNECT LINES, AND PREPARATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/082130
Kind Code:
A1
Abstract:
The embodiments of the present application relate to the technical field of chips. Provided are a fan-out packaging structure and a preparation method thereof. In the fan-out packaging structure provided in the embodiments of the present application, and a fan-out packaging structure prepared using the preparation method provided in the embodiments of the present application, inter-chip fine interconnect lines are provided between functional surfaces of chips, so that fine interconnect pin pads of all adjacent chips are electrically interconnected. Therefore, the fan-out packaging structure provided in the present application and the packaging structure prepared using the preparation method provided in the present application simplify a process flow and save on costs.
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Inventors:
YAN YINGQIANG (CN)
HU CHUAN (CN)
LING YUNZHI (CN)
ZHENG WEI (CN)
CHEN ZHITAO (CN)
HU CHUAN (CN)
LING YUNZHI (CN)
ZHENG WEI (CN)
CHEN ZHITAO (CN)
Application Number:
PCT/CN2022/125896
Publication Date:
April 25, 2024
Filing Date:
October 18, 2022
Export Citation:
Assignee:
INST OF SEMICONDUCTORS GUANGDONG ACADEMY OF SCIENCES (CN)
International Classes:
H01L23/498; H01L21/56
Foreign References:
| CN107689359A | 2018-02-13 | |||
| CN110197793A | 2019-09-03 | |||
| CN114284240A | 2022-04-05 | |||
| CN111244082A | 2020-06-05 | |||
| US20210074645A1 | 2021-03-11 |
Attorney, Agent or Firm:
CHOFN INTELLECTUAL PROPERTY (CN)
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