ENCRYPTION DEVICE, ENCRYPTION METHOD, AND ENCRYPTION PROGRAM

WIPO Patent Application WO/2023/013470

A1

In order to update each of a plurality of internal states of a specified bit length, an encryption device equipped with an encryption method for executing an AES round function multiple times comprises a processing unit that collectively processes, by means of a single instance of calling of a predetermined command, a group of round functions executable in parallel. The command has an upper limit for the number of bits that can be processed, and the round functions are grouped so as to minimize a processing load corresponding to the number of instances of calling of the command.

JP2011142411	ENCRYPTION PROCESSING DEVICE
WO/2014/109059	DATA ENCRYPTION STORAGE SYSTEM AND METHOD
JPH1165441	METHOD AND DEVICE FOR PROVIDING IDENTITY OF PLAIN SENTENCE FOR PLURAL CIPHERED SENTENCES

NAKANO YUUTO (JP)
FUKUSHIMA KAZUHIDE (JP)

PCT/JP2022/028741

February 09, 2023

July 26, 2022

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KDDI CORP (JP)

G09C1/00

JP2012215816A	2012-11-08
JP2021127442A	2021-09-02

KOSEI SAKAMOTO ; FUKANG LIU ; YUTO NAKANO ; SHINSAKU KIYOMOTO ; TAKANORI ISOBE: "Rocca: An Efficient AES-based Encryption Scheme for Beyond 5G (Full version)", IACR, INTERNATIONAL ASSOCIATION FOR CRYPTOLOGIC RESEARCH, vol. 20220131:075705, 31 January 2022 (2022-01-31), International Association for Cryptologic Research, pages 1 - 41, XP061070100
LEBBINK HENK-JAN: "VAESENC", 23 October 2019 (2019-10-23), XP093033127, Retrieved from the Internet [retrieved on 20230320]
J. JEAN1. NIKOLIC: "in Fast Software Encryption", vol. 9783, 2016, SPRINGER BERLIN HEIDELBERG, article "Efficient Design Strategies Based on the AES Round Function", pages: 334 - 353

TAZAKI Akira et al. (JP)

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