Title:
DATA READ-WRITE CIRCUIT, METHOD AND DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/184658
Kind Code:
A1
Abstract:
Provided in the present application are a data read-write circuit, method and device. The circuit comprises a controller and a memory, wherein the memory is used for decoding an instruction according to a first clock signal sent by the controller, and sampling data according to a second clock signal sent by the controller; the memory comprises a first storage module, a second storage module, and a mode register, the mode register storing a second synchronization parameter, and the second storage module being provided with a second delay circuit; when the first storage module is subjected to read and write, the controller is used for synchronizing the first clock signal and the second clock signal by means of a first synchronization parameter; and when the second storage module is subjected to read and write, the controller is used for performing first synchronization on the first clock signal and the second clock signal by means of the first synchronization parameter, and the memory is used for performing second synchronization on the first clock signal and the second clock signal by means of the second delay circuit and the second synchronization parameter. The present application can reduce clock synchronization complexity by means of superposition of clock synchronization.
Inventors:
GAO ENPENG (CN)
Application Number:
PCT/CN2022/092536
Publication Date:
October 05, 2023
Filing Date:
May 12, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G11C11/4096; G11C11/4063
Foreign References:
| CN1856835A | 2006-11-01 | |||
| CN1435843A | 2003-08-13 | |||
| CN104810054A | 2015-07-29 | |||
| CN1507629A | 2004-06-23 | |||
| US20020109528A1 | 2002-08-15 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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