BACKGROUND

[0001] Embodiments of the present disclosure relate to apparatuses and methods for wireless communication.

[0002] Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts. The performance of a wireless communication system can be affected by various factors that can distort or interfere with the wireless signals. Thermal noise and interference, which are both referred to as noise here, are major ones among these factors.

[0003] Noise may deteriorate the quality of the received signals and limit overall system performance. For these reasons, a wireless communication system may require knowledge about or estimation of noise so as to accurately process the received signals.

SUMMARY

[0004] According to one aspect of the present disclosure, an apparatus implementing noise variance estimation is provided. At the apparatus, a plurality of channel impulse responses (CIRs) in a time domain may be obtained. Each of the plurality of CIRs may include a plurality of taps. Average power of the CIRs may be calculated for the plurality of taps of the CIRs. A noise area based on the average power of the CIRs may be determined. The noise area may include at least one noisy tap. A difference in the CIRs may be calculated for the at least one noise tap in the noise area. Noise variance may be estimated based on the difference of the CIRs.

[0005] According to another aspect of the present disclosure, a system implementing noise variance estimation is provided. The system may include an antenna, an IFFT circuit, one or more processors, and memory. The antenna may be configured to receive two reference signal (RS) symbols. The IFFT circuit may be configured to convert the two RS symbols to two CIRs in a time domain. Each of the two CIRs may include a plurality of taps. At the system, average power of the two CIRs may be calculated for the plurality of taps of the CIRs. A noise area may be determined based on the average power of the two CIRs. The noise area may include at least one noisy tap. A difference between the two CIRs may be calculated for the at least one noise tap in the noise area. Noise variance may be estimated based on the difference between the two CIRs. [0006] According to still another aspect of the present disclosure, a method for noise variance estimation is provided. The method may include obtaining two channel impulse responses (CIRs) in a time domain. Each of the two CIRs may include a plurality of taps. Average power of the CIRs may be calculated for the plurality of taps of the CIRs. A noise area may be determined based on the average power of the CIRs. The noise area may include at least one noisy tap. A difference between the CIRs may be calculated for the at least one noise tap in the noise area. Noise variance may be estimated based on the difference of the CIRs.

[0007] These illustrative embodiments are mentioned not to limit or define the present disclosure, but to provide examples to aid understanding thereof. Additional embodiments are described in the Detailed Description, and further description is provided there.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable a person skilled in the pertinent art to make and use the present disclosure.

[0009] FIG. 1 illustrates a channel impulse response (CIR) experiencing signal leakage from a main lobe into side lobes.

[0010] FIG. 2 illustrates an exemplary wireless network, in which certain aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure. [0011] FIG. 3 illustrates a block diagram of an exemplary node, according to some embodiments of the present disclosure.

[0012] FIG. 4 illustrates a block diagram of an exemplary system, according to some embodiments of the present disclosure.

[0013] FIG. 5 illustrates a block diagram of an exemplary noise variance estimator, according to some embodiments of the present disclosure.

[0014] FIG. 6 illustrates a flow chart of an exemplary method for noise variance estimation, according to some embodiments of the present disclosure.

[0015] FIG. 7 is an exemplary illustration of an average power profile for CIR tap, according to some embodiments of the present disclosure.

[0016] Embodiments of the present disclosure will be described with reference to the accompanying drawings. DETAILED DESCRIPTION

[0017] Although specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to a person skilled in the pertinent art that the present disclosure can also be employed in a variety of other applications.

[0018] It is noted that references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “some embodiments,” “certain embodiments,” “one instance,” “some instances,” “other instances,” etc., indicate that the embodiment/example described may include a particular feature, structure, or characteristic, but every embodiment/example may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0019] In general, terminology may be understood at least in part from usage in context. For example, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures, or characteristics in a plural sense. Similarly, terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for the existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0020] Various aspects of wireless communication systems will now be described with reference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system.

[0021] The techniques described herein may be used for various wireless communication networks, such as code division multiple access (CDMA) system, time division multiple access (TDMA) system, frequency division multiple access (FDMA) system, orthogonal frequency division multiple access (OFDMA) system, single-carrier frequency division multiple access (SC- FDMA) system, and other networks. The terms “network” and “system” are often used interchangeably. A CDMA network may implement a radio access technology (RAT), such as Universal Terrestrial Radio Access (UTRA), evolved UTRA (E-UTRA), CDMA 2000, etc. A TDMA network may implement a RAT, such as the Global System for Mobile Communications (GSM). An OFDMA network may implement a RAT, such as Long-Term Evolution (LTE) or New Radio (NR). The techniques described herein may be used for the wireless networks and RATs mentioned above, as well as other wireless networks and RATs.

[0022] In a wireless communication system, data is transmitted in a shared data channel between a base station and a user equipment (UE). Downlink and uplink construct the two-way communication between the base station and the UE through the data channel. In the downlink, baseband signals may be demodulated and decoded to extract raw data that can be processed by a host chip. In the uplink, the host chip may generate raw data for subsequent encoding, modulation, and mapping in a baseband chip of the network. Either in the downlink or uplink, various levels of noise may be introduced, for which energy interference that affects the quality of the wireless signals may occur. There are many causes of noise that can interfere with a wireless network. It can be natural or caused by internal electronic elements in the network. For example, radio frequency (RF) filters in an RF chip of the network may bring internal noises of different levels. If the noise level is too high, it may cause degradation of the strength and performance of the wireless signals. For various reasons, it becomes crucial to understand the ways to compensate or mitigate the impact of noise on the systems.

[0023] Noise variance is a measure of the statistical data scatters regarding the noise magnitude of the received signals. A receiver may estimate the noise variance to assess the performance of the wireless communication systems and to improve the channel quality. Accordingly, estimation of noise variance for each receiver antenna becomes a key procedure when evaluating the performance of the wireless communication systems.

[0024] A channel model may be viewed as a statistical representation of the effects of a communication channel through which wireless signals are propagated. In other words, the channel model is an impulse response of the channel medium in a time domain or its Fourier transform in a frequency domain. In view of the above, e.g., with an orthogonal frequency division multiple (OFDM) system, noise variance estimation can be done based on a channel impulse response (CIR) in a time domain or a frequency response.

[0025] In one of the other approaches, noise variance is estimated on frequency responses of a single symbol. For a given antenna, to estimate the noise in an zth frequency bin/tone, a difference in two adjacent tones is employed, which can be expressed as: where z denotes a frequency index corresponding to a tone, j denotes an index corresponding to a symbol, and hij and h _i+1 j are the channel outputs in the frequency domain, corresponding to the same symbol having index j, received at tone z and z+1, respectively.

[0026] In an ideal situation, it can be assumed that the channel inputs are not filtered and distorted by the channel. The assumption may imply that the channel attenuation, the delay, and the carrier phase between the inputs and the outputs can be removed from consideration at the receiver. Consequently, the channel outputs and h _i+1 j can be simply expressed in terms of the input j, respectively, as: where nij and n _i+1 j denote the noises corresponding to the channel outputs h _L j and h _i+1 j , respectively.

[0027] In view of Equations (2) and (3), the noise hi in the frequency responses can be further simplified as: ni ~ ^i,j ~ i+l,j

— ⁿ i,j ~ ⁿ i+l,j -

[0028] In statistics, one of the most important indices for evaluating a sequence of discrete random noise variables is the spread of the distribution of the variables, i.e., the noise variance, which can be expressed as:

(4), where N is the total number of the tones corresponding to the symbol j, denotes the noise associated with the symbol at tone z, and r is the Hermitian transpose of i. The noise variance, as expressed in Equation (4), may represent the average power of the received signals.

[0029] The above example places an assumption that the channel inputs are not filtered and distorted by the channel. In a real situation, however, it may not be practical to conclude that the channel attenuation, the delay, and the carrier phase between the inputs and the outputs are all ignorable. Namely, the channel inputs may not be the same and may be required to be expressed as hij and h _i+1 j differently. In other words, the estimated noise at the receiver can include both the noise and the channel difference between tones i and z+1. As a result, although the assumption may simplify the process, its resulting estimation using Equations (2) and (3) can associate with a large amount of error.

[0030] In another approach, the noise nt is estimated based on channel difference between two closest symbols for the same frequency tone which can be expressed as: ni ~ -i,j ~ -ij+l where z denotes a tone index, j denotes an index corresponding to a symbol, and h _L j are the channel outputs, corresponding to two symbols received at the same tone z. Similar to the above approach, in a situation with high doppler, the noise nt may also include the noise and the channel difference, and the estimation may also associate with a large amount of error.

[0031] Therefore, some approaches resort to channel impulse response (CIR) for estimating noise variance estimation. The channel energy is concentrated at the center of the CIR within a certain level of delay spread, e.g., one or two cyclic prefixes (CPs) - i.e., one or two times of the CP. It may be reasonable to assume that the power outside a maximal delay spread of the CIR results from noises. By contrast, compared to the other approaches using the frequency responses, these approaches based on CIR may not associate with the issue of long delay spread and/or high doppler.

[0032] However, with these approaches, the signal leakage in the CIR can be an issue. FIG. 1 illustrates a CIR experiencing signal leakage into the side lobes. The signal in the main lobe leaks to the CIR side lobes, which causes the power outside the maximal delay spread to include both the noise and the signal per se. The signal that leaks from the main lobe to the side lobes may become more pronounced in those cases with a high signal-to-noise ratio (SNR). As a result, when noise variance is estimated based on the noise areas of the side lobes, the estimation may suffer a larger error, particularly, in some high SNR channels.

[0033] In view of the above and other issues, the present disclosure provides apparatuses, systems, and methods implementing noise variance estimation, with which the long delay spread, high doppler, or signal leakage that occurs in the other approaches can be avoided. In the present approach, a plurality of CIRs (e.g., two CIRs) in the time domain are employed for the noise variance estimation. The term “CIRs in the time domain” may refer to the CIRs adjacent in time occasions, such as symbols. Consequently, the issues of the channel delay spread in high doppler cases of the other approaches based on frequency responses can be prevented. Meanwhile, through the comparison of the plurality of CIRs, the issues of the power leakage in the noise areas can be removed from the estimation. That is, even in high SNR regimes, the present approach can still provide satisfactory estimation with fewer errors compared to the other approaches.

[0034] Reference will now be made in detail to exemplary embodiments of the present disclosure in the following, which may be illustrated in the accompanying drawings. It is apparent that the embodiments are some but not all of the embodiments of the present disclosure, and the drawings are used for illustration but not for limitation.

[0035] FIG. 2 illustrates an exemplary wireless network 200, in which certain aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure. As shown in FIG. 2, wireless network 200 may include a network of nodes, such as a user equipment (UE) 202, an access node 204, and a core network element 206. UE 202 may be any terminal device, such as a mobile phone, a desktop computer, a laptop computer, a tablet, a vehicle computer, a gaming console, a printer, a positioning device, a wearable electronic device, a smart sensor, or any other device capable of receiving, processing, and transmitting information, such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Internet-of-Things (loT) node. It is understood that UE 202 is illustrated as a mobile phone simply by way of illustration and not by way of limitation.

[0036] Access node 204 may be a device that communicates with UE 202, such as a wireless access point, a base station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation NodeB (gNodeB or gNB), a cluster master node, or the like. Access node 204 may have a wired connection to UE 202, a wireless connection to UE 202, or any combination thereof. Access node 204 may be connected to UE 202 by multiple connections, and UE 202 may be connected to other access nodes in addition to access node 204. Access node 204 may also be connected to other user equipment. It is understood that access node 204 is illustrated by a radio tower by way of illustration and not by way of limitation.

[0037] Core network element 206 may serve access node 204 and UE 202 to provide core network services. Examples of core network element 206 may include a home subscriber server (HSS), a mobility management entity (MME), a serving gateway (SGW), or a packet data network gateway (PGW). These are examples of core network elements of an evolved packet core (EPC) system, which is a core network for the LTE system. Other core network elements may be used in LTE and in other communication systems. In some embodiments, core network element 206 includes an access and mobility management function (AMF) device, a session management function (SMF) device, or a user plane function (UPF) device, of a core network for the NR system. It is understood that core network element 206 is shown as a set of rack-mounted servers by way of illustration and not by way of limitation.

[0038] Core network element 206 may connect with a large network, such as Internet 208, or another Internet Protocol (IP) network, to communicate packet data over any distance. In this way, data from UE 202 may be communicated to other user equipment connected to other access points, including, for example, a computer 210 connected to Internet 208, for example, using a wired connection or a wireless connection, or to a tablet 212 wirelessly connected to Internet 208 via a router 214. Thus, computer 210 and tablet 212 provide additional examples of possible user equipment, and router 214 provides an example of another possible access node.

[0039] A generic example of a rack-mounted server is provided as an illustration of core network element 206. However, there may be multiple elements in the core network including database servers, such as a database 216, and security and authentication servers, such as an authentication server 218. Database 216 may, for example, manage data related to user subscription to network services. A home location register (HLR) is an example of a standardized database of subscriber information for a cellular network. Likewise, authentication server 218 may handle the authentication of users, sessions, and so on. In the NR system, an authentication server function (AUSF) device may be the specific entity to perform user equipment authentication. In some embodiments, a single server rack may handle multiple such functions, such that the connections between core network element 206, authentication server 218, and database 216, may be local connections within a single rack.

[0040] Each element in FIG. 2 may be considered a node of wireless network 200. More detail regarding the possible implementation of a node is provided by way of example in the description of a node 300 in FIG. 3. Node 300 may be configured as UE 202, access node 204, or core network element 206 in FIG. 2. Similarly, node 300 may also be configured as computer 210, router 214, tablet 212, database 216, or authentication server 218 in FIG. 2. As shown in FIG. 3, node 300 may include a processor 302, a memory 304, and a transceiver 306. These components are shown as connected to one another by a bus, but other connection types are also permitted. When node 300 is UE 202, additional components may also be included, such as a user interface (UI), sensors, and the like. Similarly, node 300 may be implemented as a blade in a server system when node 300 is configured as core network element 206. Other implementations are also possible.

[0041] Transceiver 306 may include any suitable device for sending and/or receiving data. Node 300 may include one or more transceivers, although only one transceiver 306 is shown for simplicity of illustration. An antenna 308 is shown as a possible communication mechanism for node 300. Multiple antennas and/or arrays of antennas may be utilized. Additionally, examples of node 300 may communicate using wired techniques rather than (or in addition to) wireless techniques. For example, access node 204 may communicate wirelessly to UE 202 and may communicate by a wired connection (for example, by optical or coaxial cable) to core network element 206. Other communication hardware, such as a network interface card (NIC), may be included as well.

[0042] As shown in FIG. 3, node 300 may include processor 302. Although only one processor is shown, it is understood that multiple processors can be included. Processor 302 may include microprocessors, microcontroller units (MCUs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout the present disclosure. Processor 302 may be a hardware structure having one or more processing cores. Processor 302 may execute software. Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Software can include computer instructions written in an interpreted language, a compiled language, or machine code. Other techniques for instructing hardware are also permitted under the broad category of software.

[0043] As shown in FIG. 3, node 300 may also include memory 304. Although only one memory is shown, it is understood that multiple memories can be included. Memory 304 can broadly include both memory and storage. For example, memory 304 may include random-access memory (RAM), read-only memory (ROM), static RAM (SRAM), dynamic RAM (DRAM), ferroelectric RAM (FRAM), electrically erasable programmable ROM (EEPROM), CD-ROM or other optical disk storage, hard disk drive (HDD), such as magnetic disk storage or other magnetic storage devices, Flash drive, solid-state drive (SSD), or any other medium that can be used to carry or store desired program code in the form of instructions that can be accessed and executed by processor 302. Broadly, memory 304 may be embodied by any computer-readable medium, such as a non-transitory computer-readable medium.

[0044] Processor 302, memory 304, and transceiver 306 may be implemented in various forms in node 300 for performing wireless communication functions. In some embodiments, processor 302, memory 304, and transceiver 306 of node 300 are implemented (e.g., integrated) on one or more SoCs. In one example, processor 302 and memory 304 may be integrated on an application processor (AP) SoC (sometimes known as a “host,” referred to herein as a “host chip”) that handles application processing in an operating system environment, including generating raw data to be transmitted. In another example, processor 302 and memory 304 may be integrated on a baseband processor (BP) SoC (sometimes known as a “modem,” referred to herein as a “baseband chip”) that converts the raw data, e.g., from the host chip, to signals that can be used to modulate the carrier frequency for transmission, and vice versa, which can run a real-time operating system (RTOS). In still another example, processor 302 and transceiver 306 (and memory 304 in some cases) may be integrated on an RF SoC (sometimes known as a “transceiver,” referred to herein as an “RF chip”) that transmits and receives RF signals with antenna 308. It is understood that in some examples, some or all of the host chip, baseband chip, and RF chip may be integrated as a single SoC. For example, a baseband chip and an RF chip may be integrated into a single SoC that manages all the radio functions for cellular communication.

[0045] Any suitable node of wireless network 200, as shown in FIG. 2, configured for receiving signals from another node (e.g., UE 202 receiving data from access node 204 via the downlink) may implement the schemes of noise variance estimation as described below with reference to FIGs. 4-8. Accordingly, compared with the known solutions in other approaches, a wireless communication system with better performance, fewer errors, simpler hardware structures, and more flexibility can be obtained.

[0046] FIG. 4 illustrates a block diagram of an exemplary system 400, according to some embodiments of the present disclosure. System 400 may include a baseband chip 402, an RF chip 404, a host chip 406, and antenna 410, according to some embodiments of the present disclosure. System 400 may be an example of any suitable node of wireless network 200 in FIG. 2, such as UE 202. In some embodiments, baseband chip 402 may be implemented by processor 302 and memory 304, and RF chip 404 is implemented by processor 302, memory 304, and transceiver 306, as described above with reference to FIG. 3. Besides the on-chip memory (also known as “internal memory” or “local memory,” e.g., registers, buffers, or caches) on each chip 402, 404, or 406, system 400 may further include an external memory 408 (e.g., the system memory or main memory) that can be shared by each chip 402, 404, or 406 through the system/main bus. Although baseband chip 402 is illustrated as a standalone SoC in FIG. 4, it is understood that in one example, baseband chip 402 and RF chip 404 may be integrated as one SoC; in another example, baseband chip 402 and host chip 406 may be integrated as one SoC; in still another example, baseband chip 402, RF chip 404, and host chip 406 may be integrated as one SoC, as described above. The present disclosure does not place limitations thereto.

[0047] In the uplink, host chip 406 may generate raw data and send it to baseband chip 402 for transmitter baseband processing, such as encoding, modulation, and mapping. Baseband chip 402 may also access the raw data generated by host chip 406 and stored in external memory 408, for example, using the direct memory access (DMA). Baseband chip 402 may first encode (e.g., by source coding and/or channel coding) the raw data and modulate the coded data using any suitable modulation techniques, such as multi-phase shift keying (MPSK) modulation or quadrature amplitude modulation (QAM). Baseband chip 402 may perform any other functions, such as symbol or layer mapping, to convert the raw data into a signal that can be used to modulate the carrier frequency for transmission. In the uplink, baseband chip 402 may send the modulated signal to RF chip 404. RF chip 404 may convert the modulated signal in the digital form into analog signals, i.e., RF signals, and perform any suitable front-end RF functions, such as filtering, digital pre-distortion, up-conversion, or sample-rate conversion. Antenna 410 (e.g., an antenna array) may transmit the RF signals provided by a transmitter (TX) of RF chip 404.

[0048] In the downlink, antenna 410 may receive RF signals and pass the RF signals to the receiver (RX) of RF chip 404. RF chip 404 may perform any suitable front-end RF functions, such as filtering, direct current (DC) offset compensation, IQ imbalance compensation, downconversion, or sample-rate conversion, and convert the RF signals into low-frequency digital signals (baseband signals) that can be processed by baseband chip 402. In the downlink, baseband chip 402 may perform receiver baseband processing, such as demodulating and decoding the baseband signals to extract raw data that can be processed by host chip 406. Baseband chip 402 may perform additional functions, such as error checking, de-mapping, channel estimation, descrambling, etc. The raw data provided by baseband chip 402 may be sent to host chip 406 directly or stored in external memory 408.

[0049] In some embodiments, in the downlink, baseband chip 402 in FIG. 4 may implement the present approach, in which a plurality of CIRs (e.g., two CIRs) may be used to estimate noise variance. Thus, the impacts of the channel difference on the estimation can be offset. Meanwhile, through using the plurality of CIRs, the signal leakages at noise areas can also be removed from the estimation. For these reasons, the noise variance estimation according to some embodiments of the present disclosure can be more robust and more applicable, particularly, at a high SNR case.

[0050] As described, antenna 410 may be configured to receive RF signals in the downlink, and the RF signals may be pre-processed and converted into digital baseband signals. The digital baseband signals may be processed by any suitable functional units to achieve different functions. Depending on a wireless communication system and application requirements, the functional units may include at least one of a digital front-end (DFE) configured for pre-processing the digital signals and a CP remover configured for removing the CP of a signal. The CP may include a cyclic extension of an OFDM symbol. The plurality of functional units may further include a channel estimator configured for estimating the channel performance, a channel compensator configured for compensating the frequency offsets and/or timing offsets of the signals for synchronization, a symbol detector configured for detecting the symbols, or a decoder configured for performing the decoding. In some embodiments, baseband chip 402 may include other modules or units configured to perform other functions.

[0051] As shown in FIG. 4, in some embodiments, the channel estimator of baseband chip 402 may include a noise variance estimator 4022 configured to estimate noise variance of the channel and an SNR estimator 4024 configured to estimate the SNR of the channel. Further, baseband chip 402 may include a local memory 4028 configured to save, store, buffer, and cache data internally in baseband chip 402. In some embodiments, baseband chip 402 may further include an inverse fast Fourier transform (IFFT) unit 4026 configured to perform the IFFT on and convert received frequency responses into signals in the time domain. In one instance, the IFFT unit 4026 may be embodied by hardware structure, and the IFFT unit 4026 may include an IFFT circuit.

[0052] FIG. 5 illustrates a block diagram of an exemplary noise variance estimator, according to some embodiments of the present disclosure. FIG. 6 illustrates a flow chart of an exemplary method for noise variance estimation, according to some embodiments of the present disclosure. In the following, the details of some embodiments of the present disclosure will be described with reference to FIGs. 6 and 7.

[0053] As described above, noise variance estimator 4022 may be configured to perform noise variance estimation based on a plurality of CIRs (e.g., two CIRs) according to some embodiments of the present disclosure. The plurality of CIRs may be analyzed to identify a noise area associated with an average power profile based on the plurality of CIRs. In some embodiments, noise variance estimator 4022 may include a power calculation module 502, an average power calculation module 504, and a noise area searching module 506, as shown in FIG. 5. In some embodiments, noise variance estimator 4022 may further include a tap locating module 508.

[0054] These modules in noise variance estimator 4022 may be implemented using electronic hardware, firmware, computer software, or any combination thereof. In some embodiments, at least part of the modules may be embodied by a processor and memory. For example, noise variance estimator 4022 is included in baseband chip 402 that has a baseband processor 302 and memory 304, as shown in FIG. 3. Baseband processor 302 may execute desired program codes in the form of instructions that can be accessed by baseband processor 302 to configure baseband processor 302 to perform desired functions in regard to the noise variance estimation. In some embodiments, part of the elements may be implemented with hardware structures, such as ASICs. Whether such elements are implemented as hardware, firmware, or software may depend upon the particular application and design constraints imposed on the overall system.

[0055] With reference to FIG. 6, the method may proceed to 602, where a plurality of reference signal (RS) symbols may be received. Reference signals are predefined signals that occupy specific resource elements within the downlink time-frequency grid. For example, the 5G NR specification includes several types of reference signals, such as demodulation reference signal (DMRS), phase tracking reference signal (PTRS), tracking reference signals (TRS), sounding reference signal (SRS), and channel state information reference signal (CSIRS). On the other hand, in 4G LTE, the reference signals include cell-specific reference signal (CRS), demodulation reference signal (DMRS), and other reference signals. These reference signals are transmitted in different ways and can be used by a receiver for different purposes.

[0056] In some instances, the reference signal may include one of, e.g., 4G LTE CRS, 5G NR tracking reference signal (TRS), and 5GNR DMRS with more than one symbol. The plurality of reference signal symbols for the same RS may be received by antenna 410 and then RF chip 404 at different times in the downlink and forwarded to baseband chip 402, as shown in FIG. 4. In one instance, the preceding RS symbol as received may be buffered in local memory 4028 for subsequent process with respect to the later RS symbol.

[0057] In some embodiments, at 604 of the method shown in FIG. 6, the reference signal symbols from the raw channel may be converted from the frequency domain to the time domain to obtain corresponding CIRs. In one instance, IFFT unit 4026 of baseband chip 402 in FIG. 4 may be configured to perform the IFFT on the reference signal symbols to obtain the CIRs in the time domain. In some embodiments, the plurality of CIRs may include two CIRs corresponding to two received RS symbols. The two CIRs may be inputted into noise variance estimator 4022 and can be utilized for noise variance estimation. For simplicity, in the following, two CIRs are used for the description of the proposed schemes, but the present disclosure does not limit the number of the CIRs, once more than one CIR can be used for the comparison and analysis.

[0058] The two CIRs can be denoted as CIRO and CIR1 that may be inputted into noise variance estimator 4022. In one instance, as described, noise variance estimator 4022 may include tap locating module 508 that is configured to identify CIR taps. The term “tap” herein may be used to refer to a point on a delay line that represents some delay. In another instance, the CIRs may include a plurality of wireless paths, and the noise estimations may be obtained based on the wireless paths. The impulse response of a channel can be represented by a model that includes some discrete impulses along the delay line with multiple taps. Each of the CIRO and CIR1 may include a plurality of taps, and the taps of CIRO and the taps of CIR1 may correspond to each other.

[0059] Each CIR tap in CIRO and CIR1, respectively, can be expressed as:

9i,o = 9i,o + «t,o (6), and

9i,i = 9i,i + n-i,i C , where i denotes an index of a CIR tap, and n _{i Q} and M srepresent the noises contained in CIR tap i corresponding to the two input RS symbols g _{i 0} and g _{t l} , respectively.

[0060] As described above, noise variance estimator 4022 may include power calculation module 502. The method may proceed to 606 in FIG. 6. At power calculation module 502, power for each tap in CIR1 and CIR2, respectively, may be calculated based on: ,o = 9i,o9i,o ( ⁸ ), and ,1 ⁼ 9i,19i,i (9), where g _{i 0} denotes a CIR tap i in CIRO and g _i * _Q is the Hermitian transpose of g _{i 0} , and g _itl denotes a CIR tap z in CIR1 and g _i * is the Hermitian transpose of g^.

[0061] Based on Equations (8) and (9), the power of each tap in CIRO can be obtained as P _{i 0} , and the power of each tap in CIR1 can be obtained as P^. At 608 of the method in FIG. 6, average power can be calculated at average power calculation module 504. The average power, corresponding to each CIR tap, can be expressed as: = ( ,o + ,i)/2 (io), where z denotes an index of a CIR tap, P _{i 0} is the power for CIR tap z in CIRO, and P _itl is the power for CIR tap z in CIR1.

[0062] In order to locate a noise area, at 610 of the method in FIG. 6, a moving window or a sliding window may be applied on the average power for each tap at noise area searching module 506. FIG. 7 is an exemplary illustration of average power for each CIR tap, according to some embodiments of the present disclosure. As shown in FIG. 7, a window may be employed and configured to move on the average power profile so as to determine a signal area. The term “signal area” herein may be referred to an area in the average power profile that covers maximal and most average power. As described above, in the CIR, the channel energy may be generally centered within the delay spread of one or two CPs. In some embodiments, the moving window having two CP lengths may thus be imposed on the average power profile to determine the signal area that covers the maximal average power inside the window. The taps outside the signal area may be assumed to belong to a noise area, and the taps in the noise areas may be recognized as noisy taps. In other embodiments, a moving window that comprises a different window width may be applied, such as one CP. The width of the moving window may be pre-determined, depending on, e.g., the channel quality.

[0063] The moving window in FIG. 7 can be used to filter out the noise data. In the interpretation, the moving window may cover a contiguous subset of a dynamic vector used to compute local statistics. At each step, the window may advance along a direction on the average power profile to add one or more new values and remove one or more old values. The local statistics may be obtained according to the values inside the window. In one example, the moving average, a simple data averaging algorithm, can be employed to obtain the local statistics of the subsets in the moving window. As the energy is concentrated at the center of the CIR within, e.g., two times of the cyclic prefix (CP), a location of the window associated with the maximum data average of the subset in the window may be identified, and the location may be determined as the signal area. Further, the area outside the signal area may be recognized and determined as the noise area.

[0064] The method may proceed to 612 in FIG. 6. Based on the preceding operations, the location of the noise area can be identified. Noise variance estimator 4022 may include a difference calculation module 510, as shown in FIG. 5. Difference calculation module 510 may be configured to receive the two CIRs as inputs and calculate a difference, in the noise area, between the two CIRs.

[0065] In the noise area, for each noisy tap, a difference between the two CIRs may be expressed as: tap difference in noise area = g _{i Q} — g _{t l} where g _iiQ denotes each CIR tap of the noise area in CIR0, denotes each CIR tap of the noise area in CIR1, as obtained from Equations (6) and (7).

[0066] As in the noise area, it can be expected that the noises dominate the signal power, even in some high doppler cases. That is, compared to the values of the noises, the channel difference does not impose a significant impact on the noise variance estimation. Even though the input symbols g _iiQ and gi i may be different, the channel difference between g _{i Q} and gi i as compared to the difference between the noises n _{i Q} and n _{i t} can approach zero or a small value, for example, a 10' ² order. For this reason, the signal leakage issue in the noise area can be removed from the consideration. In other words, the difference of the input symbols g _iiQ and g _i;l can be safely ignored. Consequently, Equation (11) can be further simplified as: tap difference in noise area = g _{i Q} — g _{t l}

— 9i,0 3” ⁿ i,0 ~ 9i,l ~ ⁿ i,l

~ nt, ₀ ~ n _l = n _t (12).

[0067] Based on Equation (12), it can be obtained that the tap difference in the noise area may be substantially equal to the noise difference of the noisy taps in the noise area.

[0068] With reference to FIG. 6, the method may proceed to 614. Noise variance estimator 4022 may further include a noise variance calculation module 512, as shown in FIG. 5. Based on an equation similar to Equation (4), noise variance may be estimated at noise variance calculation module 512 according to: where M is the total number of the CIR taps inside the noise area (or the noisy taps), n denotes the noise difference between CIRO and CIR1 corresponding to noisy tap i in the noise area, and nf is the Hermitian transpose of nt.

[0069] In some embodiments, to simplify the calculation on Equation (13) and not to exhaust all noisy taps, only the noise difference, corresponding to a noisy tap, greater than a threshold may be brought into the calculation of Equation (13).

[0070] The present disclosure provides apparatuses, systems, and methods implementing noise variance estimation, with which the long delay spread, high doppler, or signal leakage that occurs in the other approaches can be avoided. In the present approach, a plurality of CIRs (e.g., two CIRs) in the time domain are employed for the noise variance estimation. Consequently, the issues of the channel delay spread in high doppler cases of the other approaches based on frequency responses can be prevented. Meanwhile, through the comparison of the plurality of CIRs, the issues of the power leakage in the noise areas can be removed from the estimation. Consequently, even in high SNR regimes, the present approach can still provide satisfactory estimation with fewer errors compared to the other approaches.

[0071] In employing a plurality of CIRs, the plurality of CIRs may be divided into multiple groups, each having two CIR symbols. The estimations may be performed based on groups. Further, the estimations based on the groups may be averaged to obtain a final estimation result.

[0072] A plurality of CIRs (e.g., two CIRs) may be used to estimate noise variance. The impacts of the channel difference on the estimation can thus be offset. Meanwhile, through using the plurality of CIRs, the signal leakages at noise areas can also be removed from the estimation. For these reasons, the noise variance estimation according to some embodiments of the present disclosure can be more robust and more applicable, particularly, in a high SNR case.

[0073] According to one aspect of the present disclosure, an apparatus implementing noise variance estimation is provided. At the apparatus, a plurality of channel impulse responses (CIRs) in a time domain may be obtained. Each of the plurality of CIRs may include a plurality of taps. Average power of the CIRs may be calculated for the plurality of taps of the CIRs. A noise area based on the average power of the CIRs may be determined. The noise area may include at least one noisy tap. A difference in the CIRs may be calculated for the at least one noise tap in the noise area. Noise variance may be estimated based on the difference of the CIRs.

[0074] In some embodiments of the present disclosure, the plurality of CIRs may include two CIRs. [0075] In some embodiments, the instructions may further cause the one or more processors to obtain two reference signal (RS) symbols in a frequency domain. The two RS symbols may be converted from the frequency domain into the time domain to form the two CIRs in the time domain.

[0076] In some embodiments, the two RS symbols may be based on an RS. The RS may include 4G Long-Term Evolution (LTE) cell-specific reference signal (CRS), 5GNew Radio (NR) tracking reference signal (TRS), and 5G NR demodulation reference signal (DMRS).

[0077] In some embodiments, an inverse fast Fourier transformation (IFFT) circuit may be configured to convert the two RS symbols from the frequency domain into the time domain to obtain the two CIRs in the time domain.

[0078] In some embodiments, the instructions may further cause the one or more processors to calculate power for each of the plurality of taps in the two CIRs. An average power profile of the two CIRs may be obtained based on the power for each of the taps in the two CIRs. The average power profile may include the average power of the CIRs for the plurality of taps of the CIRs. Using a moving window, a signal area of the average power profile may be determined. The noise area may include an area outside the signal area of the average power profile.

[0079] In some embodiments, a width of the moving window may be two times of a cyclic prefix of an RS. The two CIRs may be obtained based on the RS.

[0080] In some embodiments, the instructions may further cause the one or more processors to advance the moving window on the average power profile. An average value of taps in the moving window may be calculated. The signal area of the average power profile may be determined based on the average value of the taps in the moving window. The signal area may include a tap of the plurality of taps corresponding to a maximal average power.

[0081] In some embodiments, the instructions may further cause the one or more processors to calculate the difference, between the two CIRs, for the at least one noisy tap in the noise area. The noise variance may be estimated based on the difference and a number of the at least one noisy tap in the noise area.

[0082] In some embodiments, the noise variance may be estimated according to:

M may be the number of the at least one noisy tap. n may denote a noise difference between the two CIRs corresponding to noisy tap i of the at least one noisy tap. nl may be a Hermitian transpose ofn _£ .

[0083] In some embodiments, in the noise area, a channel difference compared to a noise difference associated with the at least one noisy tap approaches zero.

[0084] According to another aspect of the present disclosure, a system implementing noise variance estimation is provided. The system may include an antenna, an IFFT circuit, one or more processors, and memory. The antenna may be configured to receive two reference signal (RS) symbols based on an RS. The IFFT circuit may be configured to convert the two RS symbols to two CIRs in a time domain. Each of the two CIRs may include a plurality of taps. At the system, average power of the two CIRs may be calculated for the plurality of taps of the CIRs. A noise area may be determined based on the average power of the two CIRs. The noise area may include at least one noisy tap. A difference between the two CIRs may be calculated for the at least one noise tap in the noise area. Noise variance may be estimated based on the difference between the two CIRs.

[0085] In some embodiments of the present disclosure, the instructions may further cause the one or more processors to estimate the noise variance based on the difference between the two CIRs and a number of the at least one noisy tap in the noise area.

[0086] In some embodiments, the noise variance is estimated according to:

M may be the number of the at least one noisy tap. n _£ may denote a noise difference between the two CIRs corresponding to noisy tap i of the at least one noisy tap. nf may be a Hermitian transpose ofn _£ .

[0087] In some embodiments, the instructions may further cause the one or more processors to calculate power for each of the plurality of taps in the two CIRs. An average power profile of the two CIRs may be obtained based on the power for each of the taps in the two CIRs. The average power profile may include the average power of the CIRs for the plurality of taps of the CIRs. Using a moving window, a signal area of the average power profile may be determined. The noise area may include an area outside the signal area of the average power profile.

[0088] According to still another aspect of the present disclosure, a method for noise variance estimation is provided. The method may include obtaining two channel impulse responses (CIRs) in a time domain. Each of the two CIRs may include a plurality of taps. Average power of the CIRs may be calculated for the plurality of taps of the CIRs. A noise area may be determined based on the average power of the CIRs. The noise area may include at least one noisy tap. A difference between the CIRs may be calculated for the at least one noise tap in the noise area. Noise variance may be estimated based on the difference of the CIRs.

[0089] In some embodiments of the present disclosure, two reference signal (RS) symbols may be obtained in a frequency domain. The two RS symbols may be converted from the frequency domain into the time domain to form the two CIRs in the time domain.

[0090] In some embodiments, calculating the average power of the CIRs may include calculating power for each of the plurality of taps in the two CIRs. An average power profile of the two CIRs may be obtained based on the power for each of the taps in the two CIRs. The average power profile may include the average power of the CIRs for the plurality of taps of the CIRs. Determining the noise area based on the average power of the CIRs may include determining, using a moving window, a signal area of the average power profile. The noise area may include an area outside the signal area of the average power profile.

[0091] In some embodiments, determining, using the moving window, the signal area of the average power profile may include advancing the moving window on the average power profile. An average value of taps in the moving window may be calculated. The signal area of the average power profile may be determined based on the average value of the taps in the moving window. The signal area may include a tap of the plurality of taps corresponding to a maximal average power.

[0092] In some embodiments, the noise variance may be estimated according to:

M may be the number of the at least one noisy tap. nt may denote a noise difference between the two CIRs corresponding to noisy tap i of the at least one noisy tap. nf may be a Hermitian transpose of n _t .

[0093] The foregoing description of the embodiments will so reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such embodiments, without undue experimentation, without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0094] Embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.

[0095] The Summary and Abstract sections may set forth one or more but not all exemplary embodiments of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the appended claims in any way.

[0096] Various functional blocks, modules, and steps are disclosed above. The arrangements provided are illustrative and without limitation. Accordingly, the functional blocks, modules, and steps may be reordered or combined in different ways than in the examples provided above. Likewise, some embodiments include only a subset of the functional blocks, modules, and steps, and any such subset is permitted.

[0097] The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments but should be defined only in accordance with the following claims and their equivalents.