Title:
ANALOG CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2023/238498
Kind Code:
A1
Abstract:
The purpose of the present invention is to reduce noise in an analog circuit equipped with an IDAC. This analog circuit includes a current generation unit and a switching circuit. The current generation unit generates a differential current corresponding to digital data on the basis of a positive power supply voltage and a negative power supply voltage. The switching circuit switches the differential current output on the basis of the digital data. A first external output terminal and a second external output terminal that output the differential current to the outside may be further provided. The switching circuit may separate the output from the current generation unit from the first external output terminal and the second external output terminal when no digital data are input.
Inventors:
NAKAMOTO EIICHI (JP)
OZAWA NOBUHISA (JP)
OZAWA NOBUHISA (JP)
Application Number:
PCT/JP2023/014588
Publication Date:
December 14, 2023
Filing Date:
April 10, 2023
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H03M1/74; H03F3/181
Foreign References:
| US10009686B1 | 2018-06-26 | |||
| JP2015519778A | 2015-07-09 | |||
| JPH11178005A | 1999-07-02 | |||
| US7733178B1 | 2010-06-08 | |||
| JPH05335838A | 1993-12-17 |
Attorney, Agent or Firm:
MARUSHIMA, Toshikazu (JP)
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