Title:
電子装置用配線基板、その製造方法及びタッチパネル
Document Type and Number:
Japanese Patent JP5142223
Kind Code:
B2
Abstract:
Disclosed is a circuit board (1) that is for an electronic device and is provided with circuit wiring on an insulating transparent substrate (2), and that is characterized by the circuit wiring having a wiring body (5) comprising copper and traces of additive elements, a first coating layer (61) that is formed on the outer perimeter of the wiring body (5) and that contacts the insulating transparent substrate, and a second coating layer (62) that does not contact the insulating transparent substrate, by the film thicknesses of the first and second coating layers (61, 62) differing from each other, by the thicker coating layer (61) being a complex oxide containing oxides of additive elements and an inorganic element oxide that can be formed into a transparent conductive oxide film, and by the concentration of additive elements in the first and second coating layers (61, 62) being greater than the concentration of additive elements in the wiring body (5).
Inventors:
Junichi Koike
Yuji Sudo
Hirashima Yoshinori
Takahiro Ito
Chiba Saki
Masahiro Kato
Yuji Sudo
Hirashima Yoshinori
Takahiro Ito
Chiba Saki
Masahiro Kato
Application Number:
JP2009203459A
Publication Date:
February 13, 2013
Filing Date:
September 03, 2009
Export Citation:
Assignee:
Tohoku University
Geomatec Co., Ltd.
Geomatec Co., Ltd.
International Classes:
G06F3/041; B32B9/00; G02F1/1343; G06F3/044; G09F9/00; G09F9/30
Domestic Patent References:
| JP63270136A | ||||
| JP9209168A | ||||
| JP2003197035A | ||||
| JP2008080743A |
Attorney, Agent or Firm:
Kenzo Fukuda
Shinichi Fukuda
Kyosuke Kato
Shinichi Fukuda
Kyosuke Kato