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Title:
【発明の名称】位相同期回路
Document Type and Number:
Japanese Patent JP3160907
Kind Code:
B2
Abstract:
A high speed synchronization pulling-in technique of a phase synchronizing circuit which is used in magnetic disc devices. When a circuit (1) for detecting a synchronous field detects a synchronous field, a selector (2) selects read data (RD), and a circuit (46) for stopping/restarting oscillation stops the oscillation of an oscillating circuit (40) by an output (RS) of a circuit (50) for controlling the timing of the oscillation. After passing bits of several bytes, the circuit (46) restarts the oscillation of the oscillating circuit (40) by an output (RS) of the circuit (50). A circuit (60) for adjusting a pulse width causes the fall of the read data (RD) to coincide with the oscillation restart by adjusting the pulse width of its output (SIN) to a delay time for restarting, and performs the high speed synchronisation pull-in.

Inventors:
Takao Ogawa
Ken Kawasaki
Application Number:
JP51286391A
Publication Date:
April 25, 2001
Filing Date:
August 06, 1991
Export Citation:
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Assignee:
Seiko Epson Corporation
International Classes:
H03L3/00; H03L7/089; H03L7/099; H03L7/10; (IPC1-7): H03L7/08; G11B20/14; H03L7/10
Domestic Patent References:
JP1217766A
JP291861A
JP211036A
JP5389651A
JP59140614A
JP58107729A
JP6421532U
Other References:
【文献】米国特許4534044(US,A)
Attorney, Agent or Firm:
Minoru Yamada



 
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