PURPOSE: To hold the high speed property at this device and to secure an independent memory area having continuous addresses in each programming module by distributing an independent temporary working area having continuous addresses in each programming module.

CONSTITUTION: Plural temporary working areas mw1, mw2 are prepared in a RAM 1. The area mw1 is exclusively used for subroutine sp1 to be a programming module, has continuous addresses and is distributed independently of the area mw2 to be used for another programming module. The area mw2 is exclusively used for a main program mp to be a programming module, has continuous addresses and is distributed independently of the area mw1 to be used for the other programming module. Thereby the registering operation of a processor for accessing the areas mw1, mw2 for respective programming modules sp1, mp can be simplified.