Title:
半導体記憶装置
Document Type and Number:
Japanese Patent JP6461422
Kind Code:
B2
Abstract:
According to one embodiment, a semiconductor memory device comprises a first bank and a second bank. Each of the first bank and the second bank comprises a memory cell having a variable resistor element, a reference cell, a sense amplifier having a first input terminal electrically coupled to the memory cell and a second input terminal electrically coupled to the reference cell, and a first transistor electrically coupling the memory cell and the first input terminal of the sense amplifier. A gate of the first transistor of the first hank and a gate of the first transistor of the second bank are independently supplied with a voltage.
Inventors:
Katsuyuki Fujita
Lim, Hyuk Sun
Lim, Hyuk Sun
Application Number:
JP2018502433A
Publication Date:
January 30, 2019
Filing Date:
March 03, 2016
Export Citation:
Assignee:
Toshiba Memory Corporation
International Classes:
G11C11/16; G11C5/14; G11C7/08
Domestic Patent References:
| JP2010040144A | ||||
| JP2002100181A | ||||
| JP2014067476A | ||||
| JP2003076431A | ||||
| JP10144079A |
Attorney, Agent or Firm:
Kurata Masatoshi
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Ukai Ken
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Ukai Ken