Title:
PACKAGED DEVICE WITH CHIPLET COMPRISING MEMORY RESOURCES
Document Type and Number:
Japanese Patent JP2021057570
Kind Code:
A
Abstract:
To provide a packaged device with a chiplet comprising memory resources.SOLUTION: Techniques and mechanisms for providing a packaged device with an integrated circuit chip and a chiplet 124, where memory resources of the chiplet are accessible by a processor of the IC chip. A hardware interface 120 of the packaged device includes first conductive contacts at a side of the chiplet, where second conductive contacts of the hardware interface are electrically interconnected to the IC chip each via a path which is independent of the chiplet. One or more of the first conductive contacts are configured to deliver power, or communicate a signal, to a device layer of one of the IC chip and the chiplet.SELECTED DRAWING: Figure 1A
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Inventors:
ADEL ELSHERBINI
VAN LE
JOHANNA M SWAN
SHAWNA LIFF
PATRICK MORROW
GERALD PASDAST
HUANG MIN
VAN LE
JOHANNA M SWAN
SHAWNA LIFF
PATRICK MORROW
GERALD PASDAST
HUANG MIN
Application Number:
JP2020108363A
Publication Date:
April 08, 2021
Filing Date:
June 24, 2020
Export Citation:
Assignee:
INTEL CORP
International Classes:
H01L25/065; G06F12/0806; G06F15/173; G11C5/04; H01L25/07; H01L25/18
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Osamu Miyazaki
Tadahiko Ito
Osamu Miyazaki