Title:
IMPLEMENTATION SYSTEM
Document Type and Number:
Japanese Patent JP2023121296
Kind Code:
A
Abstract:
To provide an implementation system capable of reducing the occurrence of soldering defects.SOLUTION: A disclosed implementation system 10 includes; a substrate heating device 50 that heats a board 200 on which the solder paste is placed to form a solder precoat 202 and a residue 203 covering the surface of the solder precoat 202 on the board 200; a board pressing device 60 that receives the substrate 200 from the substrate heating device 50 and destroys the residue 203 covering the surface of solder precoat 202; and a flux application unit 80 that receives the board 200 from the board pressing device 60 and applies flux F to the solder precoat 202. The implementation system 10 mounts an electronic element on the solder precoat 202 coated with flux F and solders to implement the same.SELECTED DRAWING: Figure 6
Inventors:
MANTANI MASAYUKI
SAKAI TADAHIKO
YOSHIOKA YUKI
SAKAI TADAHIKO
YOSHIOKA YUKI
Application Number:
JP2022024553A
Publication Date:
August 31, 2023
Filing Date:
February 21, 2022
Export Citation:
Assignee:
PANASONIC IP MAN CORP
International Classes:
H05K13/04; B23K1/00; B23K1/20; B23K3/00; H05K3/34
Attorney, Agent or Firm:
Patent Attorney Kawasaki Patent Office