Title:
遅延回路及びそれを備えたアナログ/デジタルコンバータ回路
Document Type and Number:
Japanese Patent JP5002964
Kind Code:
B2
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Inventors:
Yuki Yamashita
Junji Toyomura
Nakamura Shogo
Yasuhide Shimizu
Junji Toyomura
Nakamura Shogo
Yasuhide Shimizu
Application Number:
JP2006011937A
Publication Date:
August 15, 2012
Filing Date:
January 20, 2006
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H03K5/13; H03K4/06; H03M1/12; H03M1/56
Domestic Patent References:
| JP5338257A | ||||
| JP4317215A | ||||
| JP4371017A | ||||
| JP3181067A | ||||
| JP21924U | ||||
| JP60105320A | ||||
| JP5023750A |
Other References:
猪飼國夫著,「パルス回路の設計」,日本,CQ出版株式会社,1979年 5月20日,第18版,44~54頁,微分回路、積分回路
Attorney, Agent or Firm:
Kenichiro Matsuo