Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
CURRENT CIRCUIT AND SIGNAL GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JP2010226363
Kind Code:
A
Abstract:

To arrange a current value of sink and a current value of discharge.

Each of first to third unit circuits includes first P channel transistors (P11, P21, and P31), second P channel transistors (P12, P22, and P32), first N channel transistors (N11, N21, and N31), and second N channel transistors (N12, N22, and N32). Characteristics of respective transistors are equal, a gate of the first N channel transistor in each unit circuit is connected to a first fixed potential Vs1, and a gate of the second P channel transistor is connected to a second fixed potential Vs2. A first node ND1 and a second node ND2 are connected to third wiring 190. The transistors P11 and N12 are set to be in on state at all times, the transistors P21 and N22 are set to be in off state at all times, a junction point between the transistors P32 and N31 is connected to an output terminal S1 connected to an external load, and the transistors P31 and N32 are controlled so that when one of them is in on state, the other one is in off state.

COPYRIGHT: (C)2011,JPO&INPIT


Inventors:
TSUJI NOBUAKI
Application Number:
JP2009070637A
Publication Date:
October 07, 2010
Filing Date:
March 23, 2009
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
YAMAHA CORP
International Classes:
H03K19/0944; H03K4/06
Attorney, Agent or Firm:
Akira Obayashi
Yashiro Hitoshi
Taro Takahashi