Title:
カウンタ回路
Document Type and Number:
Japanese Patent JP5586399
Kind Code:
B2
Abstract:
A counter includes a buffer unit and a ripple counter. The buffer unit generates at least one least significant signal of a count by buffering at least one clock signal until a termination time point. The ripple counter generates at least one most significant signal of the count by sequentially toggling in response to at least one of the least significant signal. The counter performs multiple data rate counting with enhanced operation speed and reduced power consumption.
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Inventors:
Gold 敬 Min
Quantity Capital People
韓 Yoon ソク
Quantity Capital People
韓 Yoon ソク
Application Number:
JP2010216009A
Publication Date:
September 10, 2014
Filing Date:
September 27, 2010
Export Citation:
Assignee:
Samsung Electronics Samsung Electronics Co, Inc.., Ltd.
International Classes:
H03K21/17; H03K23/00; H03M1/56
Attorney, Agent or Firm:
Patent business corporation symbiosis international patent firm