Title:
COMPENSATING NETWORK FOR SERVO-CONTROL CIRCUIT IN ACTIVE MAGNETIC BEARING
Document Type and Number:
Japanese Patent JP3694043
Kind Code:
B2
Abstract:
PURPOSE: To simplify the mounting and to eliminate the necessity of a huge investment by arranging a differential means of an input signal, to depend upon the operation of a peak limiting means, and by reproducing an input signal with an output signal unless it reaches to a threshold voltage.
CONSTITUTION: This compensating network is composed of a single computing circuit 10 connected in the form of an inverter, and is provided with an invert input end for receiving an input signal Ve by way of a first impedance circuit 20. Meanwhile, a second impedance circuit 30 is connected so as to apply a negative feed-back between the output of an amplifier for transmitting an output signal Vs and the noninvert input end. With this arrangement, a means for differentiating the input signal is obtained. Further, the first impedance circuit 20 incorporates a parallel connection of two series resistance (r), R1 in series to a capacitor C. Further, the second impedance circuit 30 incorporates an impedance circuit 20 equivalent to the first impedance circuit 200 and a peak limiting means 300.
Inventors:
Luc Bodercou
Maurice Brunet
Maurice Brunet
Application Number:
JP13431194A
Publication Date:
September 14, 2005
Filing Date:
June 16, 1994
Export Citation:
Assignee:
Societe du Mechanic Magnetic Societe Anonym
International Classes:
F16C32/04; F16C39/06; G05B11/36; (IPC1-7): F16C32/04; G05B11/36
Domestic Patent References:
| JP52093853A | ||||
| JP59089821A |
Attorney, Agent or Firm:
Takashi Ishida
Kenzo Hiraiwa
Toshio Toda
Masaya Nishiyama
Kenzo Hiraiwa
Toshio Toda
Masaya Nishiyama