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WO/2006/008188A1 |
A method of adjusting an analog-to-digital converter (300) having two channels in quadrature (I, Q), each having an associated input (101, 102) and output (108, 109), for converting a complex analog input signal into a complex digital ou...
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WO/2006/006993A1 |
A hybrid tuning circuit is used consisting of a digital finite state machine and an analog tuning circuit to effectively keep the RC product of the continuous time integrator constant across process, temperature, supply, and sampling rat...
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WO/2006/007024A1 |
The present invention is directed to the isolation and cancellation of the offset voltage component typically experienced at the input of sampled-data analog systems. In an exemplary embodiment, offset isolation and cancellation may be p...
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WO/2006/003502A1 |
A method for detecting the presence or absence of an audio signal in a communications system in which an audio signal is encoded by a delta modulation encoding algorithm, and in which a step size parameter is adapted according to charact...
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WO/2006/000987A1 |
An ADC (100) comprises: a plurality of differential amplifiers (41-46), each having a first input connected to a signal input (6) and having a second input connected to a respective one of a plurality of reference voltages; a plurality o...
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WO/2005/125017A2 |
Systems and methods for analog to digital conversion that may be implemented using a digital to analog converter (DAC) to provide negative feedback to cancel signals at the input of an analog to digital converter (ADC), and that may be u...
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WO/2005/119379A1 |
The invention provides a technique of correcting time data based on a clock signal affected by jitter. The error due to jitter in a time measurement of an event in the clock signal (17) is determined at the time of the event or as an ave...
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WO/2005/117258A1 |
A system clock generator circuit for use in a D/A converter that allows the clock of any frequency to be inputted and also allows usage limiting-conditions to be simplified. A system clock generator circuit for use in a D/A converter for...
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WO/2005/117269A1 |
When a reference signal is generated for a digital-to-analog converter in the feedback path of a sigma-delta modulator, the reference signal can contain modulated error signals, for example when the reference generator implements dynamic...
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WO/2005/107077A1 |
Methods and apparatus for reducing the thermal noise integrated on a storage element are disclosed. One embodiment of the invention is directed to a sampling circuit comprising a sampling capacitor to store a charge, the sampling capacit...
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WO/2005/104377A2 |
A system and method for analog-to-digital conversion (118) using digital pulse width modulation (PWM) is disclosed. The method and system according to the disclosed invention converts an analog input signal (104) to a digital signal in p...
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WO/2005/104378A1 |
A sigma delta modulation loop circuit (1A) and related method is provided for use in a device having a radio frequency receiver (102). The loop is configured to compensate for noise that is generated by the sigma delta loop and that affe...
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WO/2005/101667A1 |
A digital system employing a multi-channel and multi-level PWM technique that allows for smoother transitions in the outputs of the multiple channels in response to variations in the level of a digital input signal. The system generates ...
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WO/2005/099096A1 |
Gain control for delta sigma analog-to-digital converter. A method is disclosed for driving the input of an integrator in a delta-sigma converter having an amplifier with a non-inverting input, an output and a positive input connected ...
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WO/2005/099098A1 |
A method of controlling a sigma delta modulator with a loop which establishes a signal transfer function, STF, and a quantization noise transfer function, NTF, of the sigma delta modulator, wherein the sigma delta modulator receives an i...
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WO/2005/096504A1 |
Methods and devices for an improved delta sigma modulator. The delta sigma modulator has multiple filters with at least one high order filter processing the MSBs of the quantizer fractional output and at least one lower order filter proc...
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WO/2005/096505A1 |
A signal scaling circuit for accurately reducing the effective amplitude of an input signal by a rational factor N/M, where N and M are integers and N < M, is disclosed. An input, reference, bias and output node as well as control circui...
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WO/2005/093959A1 |
A method and arrangement of reducing inter-symbol interference occurring at the digital to analog conversion of a one bit digital signal is provided. During the generation of the one-bit digital signal in a sigma-delta converter the edge...
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WO/2005/093934A1 |
The invention relates to a method for operating a supply unit for a power stage, especially in a power electronics system for an electric motor, whereby a control current is switched by an inductive converter by means of a first and a se...
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WO/2005/083888A1 |
The invention relates to a power-saving multibit delta-sigma converter (1) comprising: an input (2) for an analog input signal (ZA) and an output (3) for a digital output signal (ZD); a digital/analog converter (4) having a bit width N a...
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WO/2005/082236A2 |
An oximeter uses a sigma-delta modulator and a multi-bit ADC (54) with PWM feedback (56) enabling high precision multi-bit conversion. Demodulation is done in software, thus requiring only a single hardware path for both red and IR. Mult...
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WO/2005/079240A2 |
A radio frequency (RF) switching power amplifier comprises: a switching amplifier 203 to provide an amplified signal within an RF band; and a delta signal modulator (DSM) 207 that is operable; to control the switching amplifier in a feed...
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WO2005048456B1 |
A multi-level pulse width modulation (multi-level PWM) technique uses multiple voltage levels and/or multiple output channels to obtain improved resolution (also referred to as dynamic range) over ordinary PWM-based digital systems, in p...
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WO/2005/078936A1 |
The invention relates to a method for the characterisation of and for correcting linear errors in analog/digital converters, in particular, in SA-analog/digital converting means, wherein a static or dynamic output bit activity is detecte...
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WO/2005/074139A2 |
A DA-converter system comprises the cascade of a multi-bit sigma-delta modulator and a DA-converter. The quantization noise of the sigma-delta modulator is isolated, the isolated quantization noise is word-length reduced in a second nois...
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WO/2005/074141A1 |
A signal processing system includes a look-ahead delta-sigma modulator (500) that processes multiple output candidate vectors (Yi) and an input vector (Xi) to determine a quantization error vector for each output candidate vector. In one...
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WO/2005/074140A1 |
A signal processing system includes a jointly non-linear delta sigma modulator (1002). In one embodiment, the jointly non-linear delta sigma modulator includes a non-linear quantization transfer function, and the output of the delta sigm...
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WO/2005/074142A1 |
A look-ahead delta sigma modulator reduces and simplifies the computations used to generate quantizer output values. Superposition can be applied to a loop filter response of the look-ahead delta sigma modulator. By superposition, the co...
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WO/2005/071845A1 |
Systems and methods are disclosed that employ a programmable analog-to-digital converter system. A programmable analog-to-digital converter system comprises a quantizer assembly and a configuration control. The quantizer assembly is conf...
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WO/2005/071846A1 |
A signal processing system includes a look-ahead delta sigma modulator (300) that processes multiple output candidate vectors (Yi) and an input vector (X) to determine an error vector for each output candidate vector. The error vector is...
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WO/2005/057793A1 |
It is possible to obtain a low spurious of a delta-sigma type fraction division PLL synthesizer. The delta-sigma type fraction division PLL synthesizer includes a first and a second L-value accumulator (31, 30), and an adder (29) for cal...
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WO/2005/055449A1 |
A bandpass sampling receiver is proposed for receiving RF signals, comprising: the first ADC, for converting the RF signal into the first path of digital signal under the control of the first sampling clock signal; the second ADC, for co...
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WO/2005/055448A1 |
A bandpass-sampling receiver is proposed, comprising: the first Sigma-delta ADC, for converting the received RF signal into the first channel of digital signal under the control of the first sampling clock signal; the second Sigma-delta ...
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WO/2005/053159A2 |
Clock pulse generator apparatus comprising a clock pulse generator (CLK) for generating a train of primary clock pulses having leading and trailing edges. A delay line (14) produces a train of delayed clock pulses (CLK D) presenting dela...
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WO/2005/048457A2 |
Systems and methods are provided for converting a digital signal into an analog signal. A digital-to-analog converter assembly comprises a delta-sigma modulator, a digital-to-analog converter, an analog filter, and a comb filter. The del...
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WO/2005/048458A1 |
A modulator, including an integrator (118), a bistable device (110), an adder (102) and a feedback loop (116) is provided. A method for converting a continuous time signal to a binary signal is also provided.
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WO/2005/043763A1 |
Systems and methods are provided for providing high dynamic range operation over a variable range of frequencies. A delta-sigma modulator, having associated frequency characteristics, produces a digital output signal. A digital-to-analog...
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WO/2005/043764A1 |
Systems and methods are provided for providing feedback to a delta-sigma analog-to-digital converter assembly. A noise shaper preprocesses an analog input signal according to an analog feedback signal and an associated transfer function....
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WO/2005/036756A1 |
A system (10) and method that generate bit-streams that result in higher compression gains. The system is akin to a normal 1-bit SDM. Internally, the system (10) tries to find the best possible bit sequence by tracing N possible solution...
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WO/2005/036533A2 |
Embodiments of the invention achieve increased compression of audio data in comparison to prior art ADPCM compression schemes using modest processing power and resources. For one embodiment, an asymmetric ADPCM encoding scheme is impleme...
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WO/2005/033925A1 |
The invention relates to a method and device for generating a thermal agitation noise and to the thus obtained thermal agitation noise. The aim of said invention is to deliver a method for generating a thermal agitation noise comprising ...
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WO/2005/034359A1 |
A measurement system includes multiple analog sensor elements and multiple sigma-delta modulators for producing digital outputs. Each sigma-delta modulator receives charge packets from one or more sensor element and charge packets from a...
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WO/2005/031980A1 |
A system and method for adaptive sigma-delta modulation. The system includes a input stage that produces a difference signal representing the difference between an analog input signal x(n) and a analog feedback signal z(n), the amplitude...
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WO/2005/027350A1 |
A pulse width modulator (104) includes at least one input for receiving an input signal and pulse width modulation circuitry (110) for generating a pulse width modulated stream and another pulse width modulated stream. The pulse width mo...
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WO/2005/015746A2 |
A noise-shaping coder with variable or reconfigurable characteristics is disclosed. In one exemplary embodiment, an improved apparatus for signal modulation is disclosed. The apparatus (see figure 1) generally comprises a noise-shaping c...
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WO/2005/011122A2 |
An integrator with a reset mechanism comprises an integration capacitor and a replacement integration capacitor, wherein the integration capacitor is replaced with the replacement integration capacitor during a reset operation. A method ...
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WO/2005/011126A1 |
Improved sigma-delta modulator (SDM) for 1-bit digital audio noise shaping. It is the object to produce a bit stream that is compatible with the Scarlet Book specification (Super Audio CD standard, SACD) and that achieves a higher lossle...
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WO/2005/008906A2 |
An image-sensing element has an array of photodiodes or other photodetecting elements and performs sigma-delta analog-to-digital conversion on the outputs of the photodetecting elements. The sigma-delta analog-to-digital converters have ...
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WO/2005/009072A2 |
The invention relates to a digital microphone comprising an integral analog-to-digital converter based on a multi-level quantizer in cascade with a digital signal converter which is adapted to provide a single-bit output signal. Preferab...
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WO/2005/002059A1 |
Analog-to-digital converter including a sigma-delta modulator (SD) with noise shaping filtering. Signal transfer filtering is introduced in the feedback loop of the sigma-delta modulator. This may be done without affecting the noise shap...
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