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WO/2014/149358A1 |
In one embodiment, a power amplification system of a radio-frequency transmitter includes a digital signal source that provides a digital input signal to an interleaved-bit- stream generator, which outputs a digital switching signal to a...
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WO/2014/150733A1 |
An apparatus includes selection logic configured to select a first subset of a first set of samples stored at a first set of registers. The first subset includes a first sample stored at a first register of the first set of registers and...
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WO/2014/127663A1 |
Embodiment of the present invention discloses an interpolation filtering method and interpolation filter, which include setting N filter processing units, wherein the filter processing unit includes a filter data buffering unit, and the ...
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WO/2014/125600A1 |
The present invention is provided with reception analog filters (13-n, where n = 0, 1, or 2) that extract a desired signal from a received signal, A/D converters (14-n) that convert the signals that have passed through the reception anal...
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WO/2014/126684A1 |
Decorrelation filter parameters for audio data may be based, at least in part, on audio characteristics such as tonality information and/or transient information. Determining the audio characteristics may involve receiving explicit audio...
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WO/2014/119815A1 |
The present invention relates to a broadband tunable bandwidth channel filter and a filtering method therefor, and makes it possible to embody a broadband tunable bandwidth channel filter by means of inexpensive FPGA even though the conv...
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WO/2014/117514A1 |
The present invention provides a filtering method and a filter. Data in data storage units in a register is input in parallel to vector storage units of a processing module, wherein the number of the vector storage units where data is in...
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WO/2014/113867A1 |
A method for removing noise from an electrical signal in an alarm system using a software filter, the method including the steps of converting the electrical signal from an analog signal into a digital signal, wherein the digital signal ...
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WO/2014/114539A1 |
A digital filter (1) for filtering an input signal (2) in order to form an output signal (6) contains a coefficient multiplier (3) and a moving average filter (5). The coefficient multiplier (3) is designed to multiply values of the inpu...
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WO/2014/100794A1 |
Method, user device and computer program product for suppressing echo. An audio signal is outputted from a speaker. A microphone receives an audio signal which includes echo resulting from said outputted audio signal. An echo path of the...
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WO/2014/100793A1 |
Method, user device and computer program product for suppressing echo. An audio signal is output from a speaker. A microphone receives an audio signal, wherein the received audio signal includes an echo resulting from said outputted audi...
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WO/2014/092617A1 |
A digital pre-distortion arrangement is disclosed. The arrangement comprises a respective filter bank for each of two or more initial signals to be amplified simultaneously by a non-linear power amplifier, N combiners, N pre-distorters a...
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WO/2014/085298A1 |
A method for audio sample rate conversion may include receiving an audio signal at a first rate, the audio signal having a fundamental frequency, determining absolute derivatives of the audio signal at the first rate, and generating a we...
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WO/2014/080649A1 |
Position coordinates difference calculation units (5a-5c) calculate position coordinates differences between the position coordinates of multiple output digital signals and the position coordinates of respective neighboring input digital...
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WO/2014/070570A1 |
One apparatus includes a notch filter that has a state observer unit and a parameter adaptation unit. The state observer unit is configured to receive a sampled noisy electrical signal and a sampled filtered electrical signal, the state ...
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WO/2014/068747A1 |
In order to achieve digital filtering that exhibits filter characteristics desired by a user while maintaining a high-speed A/D conversion cycle, an A/D conversion device (100) is equipped with: an input data storage section (131) for st...
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WO/2014/059172A2 |
A Digitally Controlled Delay Line (DCDL) for a Structured ASIC chip is used to delaying input or output signals into or out of core logic in a Structured ASIC. The DCDL has a multi-stage configuration that in a preferred embodiment compr...
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WO/2014/049383A1 |
The invention proposes a method for digitizing an analogue signal causing a device to perform: -converting the analogue signal to a digital signal at an input sample rate using an ADC, -detecting blocker in the signal, -applying to the d...
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WO/2014/049384A1 |
The invention proposes a digital receiving architecture wherein the sample rate converter is designed based on a first stage consisting of a Farrow structure followed by a decimator. This way, it is possible to use the same decimator for...
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WO/2014/030384A1 |
According to the present invention, a positional coordinate difference calculator (5) calculates the positional coordinate difference between the positional coordinates of an output digital signal and the positional coordinates of an inp...
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WO/2014/027570A1 |
The purpose of the present invention is to obtain a signal generating device capable of generating an interpolation signal without the need for increased memory capacity, even in cases in which an interpolated value approximating a true ...
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WO/2014/021666A1 |
The present invention relates to a single filter bank and to a method for designing same. More particularly, the method for designing a single filter bank comprises: a step of setting a low pass filter having 2N degree to separate and ac...
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WO/2014/008810A1 |
Large-caliber telescope non-linear interference detecting and filtering method: (1) the measure of the oil pad interference is accomplished with one of the following two methods, accelerometer and encoder, or using both of the said metho...
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WO/2013/189942A2 |
The invention relates to a sub-band splitter unit for splitting a broadband input signal (G1), e.g., an audio signal, in K narrowband sub-band signals (L1,....., Lk,....., LK), wherein K is an integer larger than 1, which sub-band splitt...
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WO/2013/183096A1 |
The present invention addresses the problem of reducing circuit scale without leading to a reduction in processing efficiency. This multi-stage filter processing method measures, at each stage, either the number of pieces of intermediate...
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WO/2013/180945A2 |
A high performance, low complexity phase shift network may be created with one or more non-first-order all-pass recursive filters that are built on top of a plurality of first-order and/or second-order all-pass recursive filters and/or d...
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WO/2013/169450A1 |
In some embodiments, a multistage filter whose biquad filter stages are combined with latency between the stages, a system (e.g., an audio encoder or decoder) including such a filter, and methods for multistage biquad filtering. In typic...
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WO/2013/128783A1 |
A Fourier transform unit (111) subjects the digital signal of a time axis to a Fourier transform, and generates a frequency domain signal which is the signal of the frequency axis. A filter unit (113) uses a number (N) of first coefficie...
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WO/2013/124443A1 |
An arrangement of overlapping filter banks comprises a synthesis stage and an analysis stage. The synthesis stage receives a first signal segmented into time blocks and outputs, based thereon, an intermediate signal to be received by the...
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WO/2013/125173A1 |
The present invention reduces the circuit size and power consumption required to apply a digital filter in the frequency domain. This digital filter circuit is provided with the following: a complex-conjugate generation unit that generat...
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WO/2013/110173A1 |
A digital infinite impulse response filter has a plurality of cascaded filter elements, with each filter element defining a pole of the filter and wherein the poles lie inside a unit circle. The filter elements are configured such that t...
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WO/2013/106370A1 |
A multi-rate filter system is disclosed. More particularly, a computationally efficient multi-rate filter system for processing an audio stream on a consumer electronics device is disclosed. The multi-rate filter system includes a plural...
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WO/2013/103562A1 |
A system includes a polyphase multirate filter and a controller which, responsive to detecting a data stream: measures a current phase relationship between a current resampling filter input clock signal and a current multirate output clo...
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WO/2013/098342A2 |
The frequency response of a digital filter, such as a pre-emphasis filter in a signal transmitter having a phase-locked loop, is adjusted using interpolation of the filter coefficients, enabling sets of filter coefficients to be pre-comp...
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WO/2013/094308A1 |
A digital filter circuit of the present invention is provided with the following: a fast Fourier transform (FFT) circuit (13) for converting a time-domain complex-number signal into a frequency-domain signal; an I/Q separation circuit (1...
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WO/2013/092140A1 |
A system is presented for sample rate conversion of an input stream of digital data among a plurality of input streams sampled at a different input. The system (1) comprises - storage means (3) for storing input samples of the input stre...
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WO/2013/085450A1 |
A heterodyne receiver structure comprises a frequency conversion block arranged to convert an incoming analogue radio frequency (RF) signal to an analogue intermediate frequency (IF) signal; a filter block arranged to filter said analogu...
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WO/2013/060463A1 |
An asynchronous sample rate converter and method for converting an input signal to a resampled output signal is disclosed. An efficient and cost-effective sample rate converter for converting an input signal of arbitrary sample rate to a...
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WO/2013/054484A1 |
The present invention provides an audio signal output device and an audio signal output method, whereby favorable high-frequency signal interpolation can be achieved. The audio signal output device and the audio signal output method usin...
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WO/2013/050494A1 |
An apparatus and method for creation of reordered vectors from sequential input data for block based decimation, filtering, interpolation and matrix transposition using a memory circuit for a Single Instruction, Multiple Data (SIMD) Digi...
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WO/2013/049858A1 |
A new and more efficient filtering system (e.g., digital microphone decimation filter architecture system) is described. A key to this architecture is the use of two parallel filter paths. Each path operates at the output sample rate, an...
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WO/2013/033837A1 |
An RF circuit having a transcoupler, a multifunctional RF-circuit element that can operate both as an impedance inverter and as a signal coupler. When connected to a fixed load impedance, the transcoupler can also operate as an impedance...
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WO/2013/033836A1 |
A transmitter that uses a digital pre-distortion (DPD) circuit to mitigate the effects of nonlinearity of a multistage or multi-branch power amplifier. The DPD circuit relies on two or more feedback signals received from an RF-output cir...
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WO/2013/031083A1 |
This symmetric filter operation device (10) is provided with: a first data shuffling unit (161) that reads a first data string from a register file (140) and extracts a left-side data string from the first data string, said first data st...
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WO/2012/168926A2 |
Highly efficient digital domain sub-band based receivers and transmitters.
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WO/2012/163133A1 |
A finite impulse response (FIR) digital filter and an implementation method therefor. The filter comprises an extraction module (101), an impulse response module (104-107), and a processing module (110). The extraction module (101) is co...
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WO/2012/163281A1 |
Disclosed is an L order N times digital extracting filter, including a plurality of alternately cascaded accumulator groups and 2 times extractors, wherein L, N and M are natural numbers, N = 2M, an output signal of the 2 times extractor...
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WO/2012/163121A1 |
Provided in the present invention are a method and device for digital filtering. The method comprises: performing an edge extraction on an input signal requiring an FIR filtering to acquire a step signal; reading unit step responses from...
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WO/2012/157427A1 |
A digital filter circuit whereby a filtering process for a plurality of channels having different sampling rates is performed with a reduced circuit size, comprises delay circuits divided into a first to mth delay device groups, a proces...
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WO/2012/153221A1 |
A spectrum agile radio having one or more variable digital filters is described. To quickly, yet accurately, retune the digital filter(s) a windowing function is applied to an ideal filter characteristic for each of one or more desired f...
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